Inner Spacer Protection in Gate-All-Around Semiconductor Fabrication
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Solution Overview
Problem
As semiconductor devices continue to shrink in size, the complexity of processing and manufacturing increases, making it challenging to form reliable devices at smaller scales.
Innovation Solution
The method involves selectively forming protective layers on the inner spacers of semiconductor devices, which act as an etch stop layer during the replacement gate process, preventing unwanted electrical connections and enhancing etch resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency is improved and costs are lowered, but fabrication processes become more difficult and device reliability deteriorates
Solution Approach 1:
The patent applies preliminary action by forming protective layers on inner spacers before the replacement gate process. This preparatory step ensures that when etching occurs during gate formation, the inner spacers are already protected, preventing unwanted electrical connections and ensuring device reliability at scaled dimensions.
Solution Approach 2:
The protective layers serve as an intermediary between the etching process and the inner spacers. These layers mediate the interaction by providing a protective barrier that allows the etching process to proceed without damaging the inner spacers, thus enabling continued scaling while maintaining reliability.
2Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency is improved and costs are lowered, but fabrication process complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the fabrication process into distinct stages with the protective layer formation as a separate, dedicated step. This segmentation allows each process step to be optimized independently, managing the overall process complexity while enabling continued scaling for improved productivity.
3Manufacturing precision
If protective layers are selectively formed on inner spacers to prevent etching, then etch resistance is improved and device integrity is maintained, but manufacturing process complexity increases
Solution Approach 1:
The patent applies local quality by forming protective layers selectively only on the inner spacers where etch protection is needed, rather than uniformly across all structures. This localized approach provides the necessary etch resistance while minimizing the addition of overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the reliable formation of semiconductor devices at smaller sizes by preventing etching of the inner spacers and maintaining the integrity of the source/drain epitaxial structures, thus ensuring the device's performance and reliability.
Implementation Method 1
selectively forming protective layers on the inner spacers of semiconductor devices, which act as an etch stop layer during the replacement gate process
Data Source
AI summary
A semiconductor device includes a substrate. Semiconductor channel layers are over the substrate. A gate structure wraps around each of the semiconductor channel layers. Source/drain epitaxial structures are on opposite sides of the gate structure. An inner spacer is vertically between adjacent two of the semiconductor channel layers. A dielectric protective layer is on a sidewall of the inner spacer.