Inner Spacer Structure for Nano-Sheet Transistor Isolation
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Solution Overview
Problem
Conventional nano-sheet-based transistors face challenges in maintaining feature integrity and reliability due to poor electronic isolation between source/drain features and gate structures, which compromises performance as devices are scaled down.
Innovation Solution
The development of nano-sheet-based transistors with inner spacer structures having less rounded sidewall surfaces, maintaining relatively large lateral widths at the top and bottom portions while reducing the middle portion's width to facilitate scale-down, thereby improving device performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional nano-sheet-based transistors are used, then device scaling is achieved, but electronic isolation between source/drain features and gate structures deteriorates
Solution Approach 1:
Inner spacer structures are introduced as intermediary elements positioned between the source/drain features and the gate structure. These spacers act as mediators that provide the necessary electronic isolation, preventing direct electrical interaction while allowing the device to maintain scaled dimensions. The inner spacers fill gaps and create protective barriers that ensure reliable isolation in scaled-down devices.
Solution Approach 2:
The device structure is segmented into distinct regions with inner spacer structures dividing the space between source/drain features and the gate. This segmentation creates separate functional zones that maintain electrical isolation while allowing each component to be optimized independently for scaled operation.
2Length of moving object
If inner spacer structures with reduced middle portion width are formed, then device scaling is facilitated, but manufacturing precision requirements increase
Solution Approach 1:
The inner spacer structures exhibit local quality variations with different lateral widths at different vertical positions. The top and bottom portions maintain relatively large lateral widths for structural integrity and isolation, while the middle portion has reduced width to facilitate scaling. This local differentiation allows the structure to meet both scaling requirements and manufacturing precision capabilities.
Solution Approach 2:
The inner spacer sidewall surfaces are engineered with controlled curvature characteristics, having less rounded profiles compared to conventional structures. This controlled curvature reduces the stringency of manufacturing precision requirements while achieving the desired width variation pattern throughout the spacer height.
3Reliability
If inner spacer structures are formed to improve electronic isolation, then device reliability is improved, but device complexity increases
Solution Approach 1:
The inner spacer structures serve multiple functions simultaneously: they provide electronic isolation between source/drain and gate, maintain structural integrity during device operation, facilitate scaling to smaller dimensions, and potentially serve as etch stop layers or deposition barriers. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in overall device complexity.
Data Source
AI summary
A first layer is formed over a substrate; a second layer is formed over the first layer; and a third layer is formed over the second layer. The first and third layers each have a first semiconductor element; the second layer has a second semiconductor element different from the first semiconductor element. The second layer has the second semiconductor element at a first concentration in a first region and at a second concentration in a second region of the second layer. A source/drain trench is formed in a region of the stack to expose side surfaces of the layers. A first portion of the second layer is removed from the exposed side surface to form a gap between the first and the third layers. A spacer is formed in the gap. A source/drain feature is formed in the source/drain trench and on a sidewall of the spacer.