Input Buffer Bias Circuit for Headroom and Breakdown Limits
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Solution Overview
Problem
Existing input buffers face challenges with headroom and breakdown voltage issues, which affect the operational efficiency and reliability of transistors in wireless transmission systems.
Innovation Solution
The input buffer design incorporates a current mirror circuit with high-voltage transistors and low-voltage transistors, ensuring that the transistors operate within the saturation region and below their breakdown voltage by precisely controlling the current and voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If transistors are used in input buffers to amplify received signals, then signal amplification capability is improved, but headroom and breakdown voltage issues arise that limit operational reliability
Solution Approach 1:
The patent changes the voltage parameter by introducing a high voltage node (BVDD) with voltage higher than the breakdown voltage of the transistors. This allows the transistors to operate in saturation region with sufficient headroom while the high voltage is only applied to the source terminal, not across the entire transistor, thus avoiding breakdown conditions and maintaining reliability while achieving signal amplification
2Productivity
If sufficient headroom is provided to ensure transistors operate in saturation region, then amplification efficiency is improved, but breakdown voltage limitations are encountered
Solution Approach 1:
The patent applies local quality by providing high voltage (BVDD) only at the source terminal of the transistors where it is needed to establish proper biasing and ensure saturation operation, while keeping the drain-terminal voltage lower to avoid breakdown. This localized high voltage application allows sufficient headroom for efficient amplification without exposing the entire transistor to breakdown conditions
Data Source
AI summary
An input buffer is provided and includes a current mirror circuit and a first amplifier. The current mirror includes first to second transistors. The first transistor is configured to couple a current source at a first node. The second transistor is coupled with the first transistor and is configured to output, according to a first current flowing through the first transistor, a second current at a second node. The first amplifier is coupled with the current mirror circuit at the second node, and includes a first transistor pair. A first breakdown voltage of the first transistor pair is smaller than a second breakdown voltage of the second transistor. The first transistor pair is configured to generate, in response to the second current and first to second input voltages, first to second voltages.