Input Buffer Circuit Voltage Domain Conversion
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Solution Overview
Problem
The existing input buffer circuits in flat panel display devices require additional circuits to convert signals between chips operating in different voltage domains, leading to increased chip size and complexity.
Innovation Solution
An input buffer circuit with multiple stages of inverters, a transfer circuit, and an output circuit that selects and processes signals from different voltage domains, allowing a reception chip to receive and convert signals from a low-voltage domain to a high-voltage domain without the need for additional circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a timing controller in a low-voltage domain converts gate signals to high-voltage domain, then the signal interface between different voltage domains is achieved, but the chip size is increased by the additional conversion circuit
Solution Approach 1:
Instead of converting low-voltage signals to high-voltage signals in the timing controller, the invention inverts the approach by having the gate driver IC convert high-voltage domain signals to low-voltage domain signals. This allows the timing controller to operate in its native low-voltage domain without additional conversion circuits, while the gate driver IC performs the voltage domain conversion internally.
Solution Approach 2:
The invention introduces an intermediate low-voltage domain interface between the timing controller and gate driver IC. The gate driver IC includes a first input buffer for low-voltage domain signals and a second input buffer for high-voltage domain signals, with a transfer circuit that acts as an intermediary to select and transfer signals between domains, eliminating the need for voltage conversion circuits in the timing controller.
2Adaptability or versatility
If additional voltage conversion circuits are added to the timing controller, then signal transmission between different voltage domains is enabled, but the device complexity is increased
Solution Approach 1:
The invention reverses the conventional approach by placing the voltage domain conversion functionality in the gate driver IC rather than the timing controller. The gate driver IC includes multiple input buffers for different voltage domains and internally performs the conversion, simplifying the timing controller's design while maintaining voltage domain compatibility.
Solution Approach 2:
The gate driver IC is designed with multi-functionality to handle both low-voltage domain and high-voltage domain signals. It includes a first input buffer configured to receive low-voltage domain signals and a second input buffer configured to receive high-voltage domain signals, with a transfer circuit that can select and process signals from either domain, making the gate driver IC universally compatible with different voltage domain configurations.
3Power
If the gate driver IC operates in a high-voltage domain, then it can drive the LCD panel with high voltage, but it cannot directly receive signals from low-voltage domain timing controllers
Solution Approach 1:
The gate driver IC's input stage is segmented into separate buffers for different voltage domains. The first input buffer is configured to receive and process low-voltage domain signals, while the second input buffer is configured to receive and process high-voltage domain signals. This segmentation allows the gate driver IC to maintain its high-voltage driving capability while simultaneously accepting signals from low-voltage domain timing controllers through the first input buffer.
Solution Approach 2:
The transfer circuit acts as an intermediary between the first and second input buffers, selecting which buffer receives the input signal based on the voltage domain. This intermediary mechanism allows the gate driver IC to flexibly accept signals from either low-voltage or high-voltage domains while maintaining its primary high-voltage driving function.
Data Source
AI summary
The present invention discloses an input buffer circuit capable of recognizing and driving a low-voltage signal, output from a low-voltage environment, in a high-voltage environment and a gate driver IC including the input buffer circuit. The input buffer circuit is configured to include two or more multi-stage inverters and to recognize and output a gate signal having a different voltage domain from an operating voltage. Accordingly, a signal interface environment between chips operating in different voltage domains can be provided.


