Differential Input Buffer With AC Feedback Against False Switching

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Solution Overview

Problem

Conventional differential input buffers in integrated circuits are prone to false switching due to noise and signal slope reversals, which compromise signal integrity and lead to errors in digital circuits.

Innovation Solution

The implementation of a differential input buffer with AC positive feedback, utilizing a capacitor to provide feedback to the comparator circuit, reduces false switching by stabilizing signal transitions and counteracting noise interference, ensuring more reliable logic level changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional differential input buffer is used, then the buffer provides high input impedance and low output impedance, but the buffer is prone to false switching due to noise and signal slope reversals

Engineering Contradiction:
Improvesignal integrityVSAvoidfalse switching due to noise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies feedback by taking a portion of the output signal and feeding it back to the input through a feedback network. This feedback mechanism counteracts the effects of noise and slope reversals by reinforcing the dominant edge and suppressing false transitions, thereby improving reliability without sacrificing the buffer's impedance characteristics

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary circuit element (the feedback network comprising resistors and capacitors) that mediates between the noisy input signal and the buffer output. This intermediary filters and conditions the signal, reducing the impact of noise and slope reversals while maintaining signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If noise filtering is increased to reduce false switching, then false switching is reduced, but signal transition speed may be degraded

Engineering Contradiction:
Improvefalse switching reductionVSAvoidsignal transition speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent employs dynamic filtering through capacitive elements in the feedback network that adapt their impedance characteristics based on signal frequency and transition rate. During rapid legitimate transitions, the feedback network maintains low impedance to preserve speed, while during noisy periods with slope reversals, it increases impedance to filter false signals, thus achieving both reliability and speed

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The AC positive feedback mechanism effectively minimizes false switching and maintains signal integrity by providing additional drive during transitions, thus enhancing the buffer's immunity to noise and ensuring accurate signal processing.

Implementation Method 1

an apparatus and method for a comparator circuit that uses AC positive feedback to reduce false switching due to slope reversals of a received signal

Methodology Applied
Scientific EffectAC positive feedback: Feedback

Data Source

PatentUS7558125B2Input buffer and method with AC positive feedback, and a memory device and computer system using same
Publication Date: 2009.07.07 MICRON TECHNOLOGY INC
  • US7558125B2 patent drawing
  • US7558125B2 patent drawing
  • US7558125B2 patent drawing

AI summary

An input buffer having a comparator that receives an input signal, a reference signal and a positive feedback. The comparator compares the input signal relative to the reference signal and generates an output signal transitioning between a first logic state and a second logic state responsive to the magnitude of the input signal transitioning through the magnitude of the reference signal. The comparator intensifies the output signal in response to the positive feedback from the output of the comparator while the output signal transitions from the first logic state to the second logic state.