Input Buffer Circuit for Floating Pad Bias and Low Loading

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Solution Overview

Problem

Integrated circuits face issues with power consumption and loading when using resistive pull-up or pull-down circuitry to prevent floating input/output pads, leading to unpredictable operation and potential damage.

Innovation Solution

An input buffer circuit with a pass transistor and latch circuitry that pre-charges the pad to a reference voltage during initialization and decouples it when driven by internal or external drivers, minimizing power consumption and reducing loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If resistive pull-up or pull-down circuitry is used to prevent floating pads, then the pad is biased to a known voltage, but power consumption increases and loading occurs

Engineering Contradiction:
Improvepad voltage stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent uses dynamic control of the pad biasing circuitry through a control signal that enables or disables the pull-up/pull-down transistors based on whether the pad is being driven. This dynamic approach allows the circuit to maintain reliability when needed while minimizing power consumption during normal operation, resolving the contradiction between stable pad voltage and low power usage.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements detection circuitry that automatically detects whether the pad is being driven by internal or external drivers and autonomously controls the biasing transistors accordingly. This self-service mechanism eliminates the need for continuous external control signals while maintaining both reliability and power efficiency, as the system self-regulates based on actual pad conditions.

Inventive Principle:
Principle #25Self-service

2Reliability

If resistive pull-up or pull-down circuitry is used to prevent floating pads, then the pad is biased to a known voltage, but loading on the pad increases

Engineering Contradiction:
Improvepad voltage stabilityVSAvoidpad loading
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent dynamically controls the resistance of the pull-up/pull-down circuitry by enabling or disabling the transistors based on pad drive status. When the pad is being driven, the transistors are disabled to minimize loading effects. When the pad is floating, the transistors are enabled to provide stable voltage biasing. This dynamic adjustment resolves the contradiction between maintaining voltage stability and minimizing loading.

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If the pad is left floating, then power consumption is reduced, but the input buffer circuitry operates unpredictably and may be damaged

Engineering Contradiction:
Improvepower consumptionVSAvoidinput buffer operation
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent employs self-service detection circuitry that automatically monitors the pad voltage and determines whether the pad is being driven or is floating. Based on this detection, the circuit autonomously enables or disables the pull-up/pull-down transistors. This self-regulating mechanism ensures reliable input buffer operation only when necessary, minimizing power consumption during normal driven operation while preventing unpredictable behavior and potential damage during floating conditions.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8723563B2Apparatus and method to tolerate floating input pin for input buffer
Publication Date: 2014.05.13 MACRONIX INTERNATIONAL CO LTD
  • US8723563B2 patent drawing
  • US8723563B2 patent drawing
  • US8723563B2 patent drawing

AI summary

An integrated circuit device includes a pad adapted to receive a signal from an internal or external driver, and an input buffer circuit including an input terminal coupled to the pad. The input buffer circuit includes a pass transistor having a control terminal, a first conduction terminal connected to the pad, and a second conduction terminal connected to a first voltage. The input buffer circuit also includes a latch having a terminal electrically coupled to the control terminal of the pass transistor. The input buffer circuit further includes circuitry coupled to the latch, the circuitry including a feedback transistor having a control terminal electrically coupled to the pad, a first conduction terminal electrically coupled to a second voltage, and a second conduction terminal coupled to the latch.