Input Buffer Hysteresis Control Across Power Domains

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Solution Overview

Problem

The miniaturization of integrated circuits poses challenges in design and manufacturing, particularly in ensuring reliable signal transmission across different power domains with varying supply voltages, leading to hysteresis window degradation due to process, voltage, and temperature variations.

Innovation Solution

An input buffer circuit with upper and lower threshold circuits and a control circuit is implemented, which adjusts threshold voltages and generates enabling signals to manage the hysteresis window, ensuring the output voltage signal remains within the suitable range for the receiving power domain, even with increasing supply voltage differences and variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the supply voltage difference between power domains increases, then the signal transmission range expands, but the hysteresis window degrades

Engineering Contradiction:
Improvesignal transmission rangeVSAvoidhysteresis window
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements dynamic threshold voltage adjustment by introducing controllable voltage sources that modify the threshold voltages of the upper and lower threshold circuits based on the supply voltage difference. This dynamic adaptation allows the hysteresis window to be maintained or enlarged even when the supply voltage difference between power domains increases, thereby resolving the contradiction between expanded signal transmission range and degraded hysteresis window reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameters (threshold voltages) of the circuit components to adapt to varying supply voltage conditions. By adjusting the threshold voltages of the upper and lower threshold circuits through controllable voltage sources, the system maintains optimal hysteresis window characteristics across different power domain voltage differences, preventing degradation while enabling broader signal transmission

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If process, voltage, and temperature variations increase, then the circuit operates under more challenging conditions, but the hysteresis window degradation accelerates

Engineering Contradiction:
Improveoperational condition rangeVSAvoidhysteresis window stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent employs feedback mechanisms through controllable voltage sources that respond to variations in supply voltage, process conditions, and temperature. These voltage sources continuously adjust the threshold voltages to compensate for environmental changes, ensuring that the hysteresis window remains stable despite operating under challenging and varying conditions, thus resolving the contradiction between operational flexibility and hysteresis window stability

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240097662A1Input buffer circuit
Publication Date: 2024.03.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240097662A1 patent drawing
  • US20240097662A1 patent drawing
  • US20240097662A1 patent drawing

AI summary

An integrated circuit includes an upper threshold circuit configured to set a logic level of a first enabling signal, a lower threshold circuit configured to set a logic level of a second enabling signal, and a control circuit configured to change an output voltage signal in response to a condition that the logic level of the first enabling signal and the logic level of the second enabling signal are changed consecutively. In the control circuit, a first switch is electrically connected to a second switch at a buffer output node. The control circuit includes a regenerative circuit configured to maintain the output voltage signal at the buffer output node while each of the first switch and the second switch is at a disconnected state.