Input Buffer Hysteresis Control Across Power Domains

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Solution Overview

Problem

The miniaturization of integrated circuits poses challenges in design and manufacturing due to stricter specifications and reliability issues, particularly in ensuring that input voltage signals are compatible with different power domains without exceeding the maximum durable voltage of electronic circuits.

Innovation Solution

An input buffer circuit with upper and lower threshold circuits and a control circuit is implemented, which generates enabling signals based on comparisons with threshold voltages, adjusting the hysteresis window and using level shifters to ensure the output voltage signal is within the suitable range for the receiving power domain, thereby preventing voltage exceeding issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the input buffer circuit uses a single threshold voltage for voltage comparison, then the circuit structure is simple, but the hysteresis window degradation due to process, voltage, and temperature variations cannot be effectively reduced

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the single threshold voltage comparison into two separate threshold voltage comparisons. The first threshold circuit compares the input voltage signal with a first threshold voltage to generate a first enabling signal, while the second threshold circuit compares the input voltage signal with a second threshold voltage to generate a second enabling signal. This segmentation allows the circuit to maintain a stable hysteresis window despite PVT variations, improving signal integrity while accepting increased circuit complexity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the input buffer circuit directly transmits voltage signals between power domains without voltage adaptation, then the transmission speed is fast, but voltage peaks may exceed the maximum durable voltage and damage electronic circuits

Engineering Contradiction:
Improvevoltage protectionVSAvoidvoltage adaptation mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary voltage adaptation mechanism consisting of threshold circuits and enabling signal generation. Instead of directly transmitting voltage signals between power domains, the input voltage signal is first compared with threshold voltages to generate enabling signals, which then control the output voltage signal. This intermediary process ensures voltage peaks do not exceed maximum durable voltage, protecting electronic circuits while maintaining controlled signal transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If the hysteresis window is fixed, then the circuit operation is simple, but the circuit cannot adapt to process, voltage, and temperature variations

Engineering Contradiction:
ImprovePVT variation adaptationVSAvoidthreshold voltage control
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a dynamic hysteresis window through two distinct threshold voltages (first threshold voltage and second threshold voltage) that can be independently adjusted. Unlike a fixed hysteresis window, this dynamic approach allows the threshold circuits to adapt to PVT variations by maintaining appropriate voltage margins. The first and second enabling signals are generated based on comparisons with these adjustable thresholds, enabling the circuit to adapt to changing conditions while managing complexity through systematic threshold control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11863189B2Input buffer circuit
Publication Date: 2024.01.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11863189B2 patent drawing
  • US11863189B2 patent drawing
  • US11863189B2 patent drawing

AI summary

An integrated circuit includes an upper threshold circuit, a lower threshold circuit, and a control circuit. The upper threshold circuit is configured to set a logic level of a first enabling signal based on comparing an input voltage signal with an upper threshold voltage. The lower threshold circuit is configured to set a logic level of a second enabling signal based on comparing the input voltage signal with a lower threshold voltage. The control circuit is configured to change an output voltage signal from a first voltage level to a second voltage level when the logic level of the first enabling signal and the logic level of the second enabling signal are changed consecutively.