Capacitively Coupled Input Buffer for Short-Tolerant Differential Clocks
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Solution Overview
Problem
Existing input buffer circuits for differential clock signals are vulnerable to accidental shorting or connection to a power source or ground, leading to waveform distortion and data errors due to the lack of additional signal paths for protection.
Innovation Solution
The input buffer circuit incorporates a differential amplifier unit with multiple input terminals capacitively coupled to provide additional signal paths for differential input signals, ensuring protection against accidental shorting by allowing the circuit to maintain operation even if one terminal is connected to a voltage or ground.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a differential amplifier is used to receive differential clock signals, then common-mode noise rejection is improved, but vulnerability to accidental shorting or connection to power source/ground increases
Solution Approach 1:
The input buffer circuit is divided into multiple independent signal paths: a first signal path through a first differential amplifier and a second signal path through a second differential amplifier. Each path can operate independently, so if one path experiences accidental shorting or connection to power source/ground, the other path remains functional and can provide the clock signal.
Solution Approach 2:
The circuit proactively provides protection against future accidental shorting or connection events by having redundant signal paths in place before any fault occurs. The multiple differential amplifiers and signal paths are pre-configured so that when an accidental shorting or connection to power source/ground happens, the unaffected path can immediately take over without interrupting the clock signal.
2Reliability
If additional signal paths are added for protection against accidental shorting, then reliability is improved, but device complexity increases
Solution Approach 1:
The multiple differential amplifiers and signal paths serve dual functions: they provide the primary differential signal processing needed for common-mode noise rejection, and simultaneously serve as redundant protection paths against accidental shorting or connection to power source/ground. This multi-functionality allows the circuit to achieve both noise rejection and fault protection without proportionally increasing complexity.
Solution Approach 2:
The circuit changes the parameter of signal path redundancy by introducing multiple differential amplifiers with different input terminal configurations. This parameter change enables the system to tolerate faults in one path while maintaining operation through other paths, achieving reliability improvement with controlled complexity increase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of devices using the input buffer circuit by reducing the risk of data errors and maintaining signal integrity, even in accidental shorting scenarios, by providing multiple signal paths that can dominate the operation and output a single-ended signal as intended.
Implementation Method 1
a capacitive coupling circuit for filtering out direct-current voltages from a differential clock signal
Data Source
AI summary
An input buffer circuit includes an input differential amplifier unit, a differential amplifier stage, and a buffer. The input differential amplifier unit has input terminals and at least one output terminal, wherein at least two of the input terminals of the input differential amplifier unit are configured to be capacitively coupled respectively so as to provide at least one pair of signal paths for a first input signal and a second input signal of a differential input signal. The differential amplifier stage, coupled to the input differential amplifier unit, has first and second differential input terminals, and a corresponding output terminal, wherein the first and second differential input terminals are capable of being coupled to the first input signal and the second input signal respectively. The buffer, coupled to the output terminal of the differential amplifier stage, is used for outputting an output single-ended signal.