Input Buffer Circuit with Stable Logic Levels Under Battery Variation

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Solution Overview

Problem

Existing input buffer circuits in power management integrated circuits (PMICs) for OLED display devices face stability issues when battery voltage varies, leading to potential operational failures and increased power consumption.

Innovation Solution

The proposed input buffer circuit includes a low voltage generator, a first hysteresis buffer, and a dual-supply level shifter. The low voltage generator produces a second power supply voltage independent of the battery voltage variation, allowing the hysteresis buffer to operate stably and the dual-supply level shifter to shift logic levels effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the input buffer circuit operates directly with battery voltage, then the circuit structure is simple, but the logic input voltage level becomes dependent on battery voltage variations causing instability

Engineering Contradiction:
Improvecircuit structureVSAvoidlogic input voltage level stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

A low voltage generator is introduced as an intermediary component between the battery voltage source and the input buffer circuit. This generator produces a stabilized second power supply voltage that is independent of battery voltage variations, thereby mediating the connection and preventing voltage fluctuations from affecting the logic input level while maintaining circuit functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The power supply function is segmented into two independent voltage generation paths: the first power supply voltage directly from the battery for general power needs, and the second power supply voltage generated by the low voltage generator for stable logic input operation. This segmentation allows different parts of the circuit to operate with appropriate voltage characteristics.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If the input buffer circuit uses battery voltage directly, then the power consumption is low, but the circuit becomes sensitive to battery voltage variations

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage variation tolerance
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The low voltage generator acts as a mediator that decouples the input buffer circuit from direct battery voltage dependence. It converts the first power supply voltage into a stabilized second power supply voltage, enabling the circuit to tolerate battery voltage variations while maintaining appropriate power consumption levels through efficient voltage conversion.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a voltage regulation mechanism is added to stabilize logic input level, then voltage stability improves, but device complexity increases

Engineering Contradiction:
Improvelogic input voltage level stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Rather than adding complex voltage regulation to the existing input buffer circuit, a separate low voltage generator is introduced as an intermediary. This generator provides stabilized voltage independently, simplifying the modification to the original circuit while achieving the desired voltage stability for logic input operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250175180A1Input buffer circuit and power management integrated circuit including the same
Publication Date: 2025.05.29 SAMSUNG ELECTRONICS CO LTD
  • US20250175180A1 patent drawing
  • US20250175180A1 patent drawing
  • US20250175180A1 patent drawing

AI summary

An input buffer circuit includes a low voltage generator, a first hysteresis buffer and a first dual-supply level shifter. The low voltage generator is connected to a first power supply voltage having a first voltage level, generates a mirrored current based on the first power supply voltage and generates a second power supply voltage having a second voltage level smaller than the first voltage level. The second power supply voltage is independent from a variation of the first power supply voltage. The first hysteresis buffer operates based on the second power supply voltage and generates a first inverted reset signal having hysteresis based on an inverted reset signal. The first dual-supply level shifter operates based on the first and second power supply voltages and generates a second inverted reset signal by shifting the first inverted reset signal from the second voltage level to the first voltage level.