High-Voltage Tolerant Input Circuit for Ultra-Low IO Supply
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Solution Overview
Problem
Conventional high voltage tolerant input circuits are limited by the threshold voltage of NMOS transistors, restricting the maximum voltage level of external input voltage that can be supplied to buffers and failing to operate at extremely low input/output (IO) supply voltages.
Innovation Solution
The input circuit incorporates a diode, resistor, buffer, bulk voltage generating unit, and enhancing unit to ensure the internal input voltage matches the external input voltage at low IO supply voltages, using PMOS and NMOS transistors to generate bulk voltages and control voltages that allow the internal voltage to be maintained at a predetermined level, enabling operation at extremely low IO supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional NMOS transistor is used to limit the voltage level, then the circuit can protect against high voltage, but the maximum voltage level is restricted to VDDIO-VthN and the circuit cannot operate at very low IO supply voltage
Solution Approach 1:
The input circuit is segmented into multiple functional blocks: an enhancing unit with first and second transistors for low-voltage operation, and a bulk voltage generating unit with third and fourth transistors for high-voltage protection. This segmentation allows each block to specialize in specific voltage ranges, resolving the contradiction between protection capability and operating range adaptability.
Solution Approach 2:
The circuit dynamically switches between different transistor configurations based on the input voltage level. When voltage exceeds VDDIO, the bulk voltage generating unit activates to provide protection, while at normal operating levels, the enhancing unit maintains full signal transmission. This dynamic behavior enables both protection and full-range operation.
2Loss of energy
If the IO supply voltage is reduced to extremely low levels, then power consumption is reduced, but the internal input voltage cannot reach the buffer threshold voltage
Solution Approach 1:
The enhancing unit changes the electrical parameters of the input circuit by introducing additional transistors that modify the voltage transfer characteristics. This allows the internal input voltage to reach the buffer threshold even when the IO supply voltage is extremely low, maintaining buffer activation reliability while enabling ultra-low power operation.
3Reliability
If the bulk voltage generating unit is activated to protect against high voltage, then voltage protection is provided, but the internal input voltage must be kept at a predetermined value below the first supply voltage
Solution Approach 1:
The bulk voltage generating unit acts as an intermediary that clamps the internal input voltage to a predetermined safe level when high voltage is detected, while the enhancing unit serves as another intermediary that restores full signal transmission during normal operation. This dual-intermediary approach resolves the contradiction between protection and signal accuracy.
Data Source
AI summary
An input circuit including a diode, a resistor, a first transistor, a buffer, a bulk voltage generating unit and an enhancing unit is provided. The input circuit of the present invention uses the bulk voltage generating unit and the enhancing unit for making the internal input voltage to be the same as the external input voltage when the external input voltage is less than or equal to the first supply voltage (for example, the IO supply voltage). Moreover, even if the first supply voltage is extremely low, the input circuit of the present can still operate correctly. Accordingly, the input circuit of the present invention can be operated at extremely low IO supply voltage.