Input Circuit Assembly for Steepness-Based Mode Switching

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Solution Overview

Problem

Existing input circuit arrangements lack versatility and flexibility in their operational modes, often requiring predefined constant values for mode selection and being limited in handling varying signal conditions, which can lead to misinterpretation of noise as data.

Innovation Solution

The input circuit arrangement is designed to switch between two operating modes based on the steepness of the connection signal, using a detection circuit that evaluates the signal's steepness to determine the appropriate mode, allowing for flexible operation and independent information supply, and includes features like a timer to maintain modes and predefined signal sequences for mode switching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If predefined constant values are used for mode selection, then the circuit operation is simplified, but the versatility and flexibility of the input circuit arrangement is reduced

Engineering Contradiction:
Improvecircuit operation simplicityVSAvoidoperational mode versatility
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent changes the parameter used for mode selection from predefined constant voltage levels to the steepness (rate of change) of the connection signal. The detection circuit evaluates how rapidly the signal changes rather than comparing it to fixed thresholds, enabling the circuit to adaptively switch between first and second operating modes based on signal dynamics. This resolves the contradiction by maintaining simple operation through automatic detection while achieving versatility through adaptive mode selection.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the input circuit arrangement uses a single connection for multiple purposes, then the connection versatility is improved, but the risk of misinterpreting noise as data increases

Engineering Contradiction:
Improveconnection versatilityVSAvoidsignal interpretation accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies dynamics by making the operating mode selection dependent on the temporal characteristics (steepness) of the connection signal rather than static voltage levels. The detection circuit continuously monitors the rate of change of the signal, allowing the system to dynamically adapt to different signal conditions. This dynamic approach enables reliable differentiation between valid data transitions and noise, even when using a single multi-purpose connection, thereby maintaining both versatility and reliability.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If the detection circuit switches modes based on signal steepness, then the operational flexibility is improved, but the device complexity increases

Engineering Contradiction:
Improveoperating mode flexibilityVSAvoiddetection circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent replaces complex mechanical or multi-component mode selection mechanisms with an electronic detection circuit that evaluates signal steepness. Instead of using multiple switches, selectors, or complex control logic, the invention uses an electronic circuit that automatically detects the rate of change of the connection signal and triggers mode switching accordingly. This substitution of electronic detection for mechanical/complex control systems achieves operational flexibility while minimizing the increase in device complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP3220280B1Input circuit assembly
Publication Date: 2020.04.15 AUSTRIAMICROSYSTEMS AG
  • EP3220280B1 patent drawingFigure 1A
  • EP3220280B1 patent drawingFigure 1B
  • EP3220280B1 patent drawingFigure 2A

AI summary

An input circuit arrangement (11) comprises a terminal (13) for supplying an input signal (SWI) and an evaluation circuit (16) with two comparators (17, 18) that compare the input signal (SWI) with two threshold values ​​(SREF1, SREF2) and provide two comparator signals (SK1, SK2) depending on the comparison result. The evaluation circuit (16) outputs a clock signal (CLK) depending on the first comparator signal (SK1) and a data signal (DIN) depending on the second comparator signal (SK2). The input signal (SWI) has clock pulses originating from a reference value (VSS) and a first amplitude (VDD) at the first logical value of the data signal (DIN) and an intermediate level (SZ) at the second logical value of the data signal (DIN). The input circuit arrangement (11) includes a signal converter (27) with a resistive element (29) and a switch (30).A series circuit comprising the switch (30) and the resistive element (29) connects the terminal (13) to a reference potential terminal (28). The input circuit arrangement (11) includes a device for measurement (65).