Input Circuit Nwell Biasing for Over-Voltage Without DC Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices face challenges in tolerating over-voltages at input pins without drawing direct DC current from external sources, which is undesirable in many applications.
Innovation Solution
An over-voltage tolerant input circuit is designed with a Nwell bias circuit and a current block circuit that includes a logic gate and transistors, allowing the Nwell bias signal to float with the over-voltage signal while blocking DC current flow, using a p-type transistor with its body coupled to the Nwell bias signal and a source coupled to a power supply voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the nwell voltage is allowed to float up with the over-voltage signal to avoid forward biasing well-diodes, then over-voltage tolerance is improved, but DC current is drawn from the external driving source
Solution Approach 1:
The circuit dynamically switches between two operational modes: during normal operation, the nwell bias circuit actively maintains the nwell at supply voltage to prevent diode forward biasing; during over-voltage conditions, the circuit transitions to a high-impedance state where the nwell floats with the input voltage while blocking DC current through the current block circuit. This dynamic adaptation resolves the contradiction by having the system behave differently under different voltage conditions.
Solution Approach 2:
The circuit changes the electrical parameters of the nwell bias circuit based on input voltage levels. When over-voltage is detected, the current block circuit modifies the bias circuit's output impedance from low (during normal operation) to high (during over-voltage), allowing the nwell voltage to follow the input voltage without drawing significant DC current. This parameter change enables the circuit to tolerate over-voltages while minimizing current draw.
2Reliability
If the Nwell bias circuit is designed to float with over-voltage signals, then device integrity is improved, but the circuit complexity increases due to additional current block circuitry
Solution Approach 1:
The current block circuit is merged with the Nwell bias circuit to form an integrated over-voltage protection mechanism. The current block circuit shares the same output node (Nwell bias) and works in conjunction with the bias circuit's existing transistors and control logic. This merging approach allows the circuit to achieve both device integrity and over-voltage tolerance without adding completely separate protection circuitry, thereby limiting the increase in overall complexity.
Solution Approach 2:
The current block circuit acts as an intermediary between the external over-voltage source and the internal Nwell bias circuit. It mediates the interaction by conditionally connecting or disconnecting the bias circuit from the external voltage source based on over-voltage detection. This intermediary function protects the internal circuitry while maintaining relatively simple architecture through the use of standard logic gate and transistor components.
Data Source
AI summary
An over-voltage tolerant input circuit has a pad. An Nwell bias circuit is electrically coupled to the pad. A current block circuit is electrically coupled to the Nwell bias circuit. The current block circuit has a control signal coupled to a gate of a transistor in a current path of the Nwell bias circuit. The current block circuit includes a logic gate having a first input coupled to the pad and a second input coupled to an over voltage signal of the Nwell bias circuit. An output of the logic gate is the control signal. An n-type transistor is coupled between the over voltage signal and the first input of the logic gate. A transistor has a gate electrically coupled to the control signal and has a drain coupled to the first input of the logic gate.