Input Circuit Time Constant Jitter Reduction

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Solution Overview

Problem

Semiconductor integrated circuits face challenges in transferring high-speed data signals with low jitter and power consumption, as existing solutions either result in erroneous data latching due to insufficient setup time or increase power consumption to suppress jitter.

Innovation Solution

The inclusion of a time constant providing circuit between the load circuit and an intermediate node in the second amplifier of the input circuit enhances signal transmission characteristics, allowing for amplification with a large gain in a wide band and improved slew rate without increasing power current, thereby reducing jitter and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If power current is increased to suppress jitter in high-speed data signals, then jitter is reduced, but power consumption increases

Engineering Contradiction:

Improvejitter suppressionVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces a time constant providing circuit as an intermediary element connected between the load circuit and the intermediate node. This circuit provides a time constant that improves signal transmission characteristics, enabling large gain amplification in a wide frequency band without requiring increased power current, thus suppressing jitter while maintaining low power consumption

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the transmission characteristics parameter by introducing a time constant through the time constant providing circuit. This parameter change enables the amplifier to achieve large gain in a wide frequency band, improving signal quality and reducing jitter without increasing power consumption

Inventive Principle:

Principle #35Parameter changes

2Reliability

If amplification gain is increased to improve signal transmission, then signal quality improves, but bandwidth decreases

Engineering Contradiction:

Improvesignal transmission qualityVSAvoidbandwidth

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The time constant providing circuit acts as an intermediary that enables the amplifier to achieve large gain amplification while maintaining wide bandwidth. The time constant improves signal transmission characteristics by shaping the frequency response, allowing high gain without the usual bandwidth penalty

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11456023B2Semiconductor integrated circuit and semiconductor storage device

Publication Date: 2022.09.27 KIOXIA CORP

AI summary

There is provided a semiconductor integrated circuit including an input circuit. The input circuit includes a first amplifier and a second amplifier. The second amplifier is electrically connected to the first amplifier. The second amplifier includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a time constant providing circuit. The first transistor has a gate electrically connected to a first node of the first amplifier. The second transistor has a gate electrically connected to a second node of the first amplifier. The third transistor is disposed adjacent to a drain of the first transistor. The fourth transistor is disposed adjacent to a drain of the second transistor. The time constant providing circuit is electrically connected between a gate of the third transistor and a drain of the third transistor, a gate of the fourth transistor.