Clamp Diode Input Circuit for Plasma Damage Self-Test
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Solution Overview
Problem
During semiconductor device fabrication, particularly in System-on-Chip (SOC) devices, electrical charge accumulation due to plasma processing can lead to damage in gate oxides of transistors, causing potential failure or weakened structures that may fail later in the field.
Innovation Solution
Incorporation of bypass paths with clamp diodes and additional transistors in circuit configurations to protect transistors from electrical discharge during plasma processing, allowing for detection and mitigation of damage through self-test algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If plasma processing is used for device fabrication, then manufacturing capability is improved, but electrical charge accumulation occurs, causing device damage
Solution Approach 1:
The patent implements preliminary protective actions by incorporating test devices and discharge paths into the isolated well structure before plasma processing begins. The test device is pre-configured with specific inter-well coupling characteristics that enable it to detect and mitigate charge accumulation during subsequent plasma etching or deposition processes, preventing device damage before it occurs.
Solution Approach 2:
The test device serves as an intermediary that absorbs and manages the harmful effects of plasma processing. By placing the test device in the isolated well structure with controlled coupling to adjacent wells, it acts as a buffer that protects the main devices from charge accumulation while allowing plasma processing to proceed normally.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents and detects plasma-induced damage, enabling ongoing operation of SOC devices, albeit at reduced clock speeds, by providing a discharge path for excessive voltage and allowing for the identification and removal of damaged components.
Implementation Method 1
electrical charge accumulation due to plasma processing can lead to damage in gate oxides of transistors
Implementation Method 2
During device fabrication, such substrates sometimes accumulate charge in the substrate itself and in the devices formed or being formed on or in the substrate
Data Source
AI summary
A system and method for electronic device damage detection is presented. A first input signal is supplied to an input terminal of an electronic device. The electronic device includes a input terminal, a first electronic circuit including a first transistor, wherein a control terminal of the first transistor is electrically connected to the input terminal, a second electronic circuit including a clamp diode transistor, wherein the clamp diode is electrically connected to the input terminal, wherein the clamp diode transistor is configured to receive a control input signal and when the control input signal has a first value the clamp diode transistor is conductive, and an output terminal electrically connected to the first electronic circuit and the second electronic circuit. The control input signal is switched between the first value and a second value and an output of the electronic device is monitored to detect a malfunction.