Wide Dynamic Range Input Protection Circuit for Bidirectional Overvoltage
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Solution Overview
Problem
Existing circuit protection methods for integrated circuits are inadequate for real-time, linear systems that require bidirectional protection against a wide dynamic range of input voltages, as they are non-linear, unidirectional, and unsuitable for repetitive voltage signals exceeding system supply voltages, which can damage dielectric and conductive materials.
Innovation Solution
A high-speed dynamic range input protection circuit using cascode switches, zener diodes, and level shifter circuits with high-voltage PMOS and NMOS field effect transistors to limit output voltage across specified ranges, providing bidirectional protection against both positive and negative voltage excursions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional ESD devices and series resistors are used for protection, then external voltages can be clamped and input currents limited, but the protection is non-linear, unidirectional, and has limited bandwidth making it unsuitable for real-time linear systems
Solution Approach 1:
The protection circuit is divided into separate unidirectional protection paths: a first protection path for negative voltage excursions using a first cascode switch, and a second protection path for positive voltage excursions using a second cascode switch. Each path independently handles one polarity of voltage excursions, enabling comprehensive bidirectional protection while maintaining linear operation throughout the entire voltage range
Solution Approach 2:
The cascode switch structure serves multiple functions simultaneously: it provides voltage clamping protection, maintains linear signal transmission, and operates bidirectionally across the full dynamic range. The protection circuit integrates both ESD protection and continuous voltage limiting in a single unified structure that operates linearly for repetitive signals
2Duration of action of stationary object
If protection circuits are designed for continuous operation, then they can handle repetitive voltage signals, but they may be non-linear and have limited bandwidth
Solution Approach 1:
The cascode switches are configured to operate in their linear region rather than saturation region, fundamentally changing the operational parameters to maintain linearity. This allows the protection circuit to respond rapidly to voltage excursions while maintaining proportional signal transmission, achieving both continuous operation and high bandwidth performance
3Reliability
If the protection circuit limits voltage excursions, then the output voltage is controlled within safe ranges, but the circuit complexity increases with multiple cascode switches and level shifter circuits
Solution Approach 1:
Protection is applied locally at each critical node where voltage excursions could cause damage. The first cascode switch protects the low-voltage circuit input, the second cascode switch protects the output node, and the level shifter provides localized voltage translation. Each component addresses a specific protection need at its local position rather than using a single complex global protection mechanism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively protects low-voltage circuits from large external voltages with low current consumption, high speed, high input impedance, and high accuracy, ensuring the circuit operates within safe limits for input voltages ranging from -10V to +70V.
Implementation Method 1
a first cascode switch to limit the output voltage when input voltage excursions are below a specified voltage operation range comprising a high-voltage PMOS field effect transistor (PMOSFET) having a control electrode, a first current carrying electrode connected across a first zener diode to the control electrode
Implementation Method 2
a blocking field effect transistor (FET) having a control electrode connected to a power supply voltage, a first current carrying electrode connected across a second zener diode to the power supply voltage
Implementation Method 3
a second cascode switch to limit the output voltage when input voltage excursions are above the specified voltage operation range comprising a high-voltage NMOS field effect transistor (NMOSFET) having a control electrode connected to the power supply voltage, a first current carrying electrode providing the output voltage and connected across a third zener diode to the control electrode
Implementation Method 4
a level shifter circuit connected between the first current carrying electrode of the high-voltage PMOSFET and the source follower node. The level shifter circuit comprises a transistor having a control electrode connected to the first current carrying electrode of the high-voltage PMOSFET, a first current carrying electrode comprising the source follower node that is connected across a fourth zener diode to the control electrode of the transistor
Data Source
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AI summary
An input protection circuit (200) and associated method are disclosed for protecting a circuit input (VINP) from positive and negative overvoltages at an input voltage (VIN) with a high-voltage PMOSFET (PI) having a gate, a drain connected across a zener diode (ZD1) to the gate, and a source connected to receive an input voltage; a blocking FET (N1) having a gate connected to a power supply voltage, a drain connected across a zener diode (ZD2) to the power supply voltage, and a source connected to the gate of the high-voltage PMOSFET; a high-voltage NMOSFET (N3) having a gate connected to the power supply voltage, a source providing the protected output voltage and connected across a zener diode (ZD3) to the gate, and a drain connected to a source follower node and a level shifter circuit (214) connected between the drain of the high-voltage PMOSFET and the source follower node.