Input Queue Switch Latency Control via Virtual Output Queues

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Solution Overview

Problem

Input queue switches experience buffer bloat, leading to increased latency and jitter due to large buffers being overwhelmed by bandwidth-hungry applications, resulting in delayed packets and potential timeouts, which negatively impact user experience.

Innovation Solution

Implementing a method where each input port receives a virtual output queue length value, calculating an aggregate queue length value, and generating feedback messages to control the draining rate of input queues and limit buffer memory usage, mimicking the latency performance of output queue switches by using smaller output queues and tail drop messages to manage congestion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If buffer size is increased, then packet loss is reduced, but latency increases

Engineering Contradiction:
Improvepacket lossVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the output queue into multiple virtual output queues (VOQs), one for each input port. This allows independent queue management for each input port, enabling the system to maintain smaller effective buffer sizes while preventing packet loss through targeted congestion management at each VOQ level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements feedback mechanisms where output ports send virtual queue length values back to input ports. This feedback enables input ports to adjust their draining rates dynamically based on actual queue status, preventing buffer bloat and latency buildup while maintaining reliable packet transmission.

Inventive Principle:
Principle #23Feedback

2Reliability

If buffer size is increased, then dropped packets are reduced, but jitter increases

Engineering Contradiction:
Improvedropped packetsVSAvoidjitter
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

By segmenting the queue into virtual output queues per input port, the system can manage each queue independently with appropriate draining rates. This segmentation prevents jitter by ensuring fair and stable packet transmission from each input port without overwhelming the shared buffer, while still maintaining reliability through coordinated packet dropping at the VOQ level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic draining rates that adjust in real-time based on queue status and feedback signals. This dynamic adjustment allows the system to maintain stable jitter performance by adapting to changing network conditions, while preserving reliability by dropping packets strategically when congestion is detected rather than allowing uncontrolled buffer growth.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If output queue is implemented, then latency performance is improved, but device complexity increases

Engineering Contradiction:
ImprovelatencyVSAvoidqueue management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent uses virtual output queues that conceptually replicate the behavior of traditional output queues without requiring physical implementation at each output port. Each input port maintains a VOQ that mirrors the output queue state, allowing latency performance to be managed through software-based queue length tracking and feedback mechanisms rather than complex hardware queue management.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The virtual queue length value acts as an intermediary signal that conveys queue status information from output ports to input ports without requiring direct complex coordination. This intermediary mechanism simplifies the overall system architecture by using lightweight feedback messages to coordinate queue management across the switch fabric, reducing the complexity burden while maintaining effective latency control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10122645B2Output queue latency behavior for input queue based device
Publication Date: 2018.11.06 CISCO TECHNOLOGY INC
  • US10122645B2 patent drawing
  • US10122645B2 patent drawing
  • US10122645B2 patent drawing

AI summary

In one implementation, an input queue switch provides latency fairness across multiple input ports and multiple output ports. In one embodiment, each input port maintains a virtual output queue for each associate output port. The virtual output queues across multiple inputs are aggregated for each specific output port. The sum of the lengths of the virtual output queues is compared to a threshold, and based on the comparison, feedback may be generated to control the operation of the input port for subsequent packets. The feedback may instruct the input port to stop buffering or drop packets destined for the output port with the sum of the lengths of the virtual output queues associated to the specific output port that exceeds the threshold. In another embodiment, each packet has an arrival timestamp, and a virtual output queue having the oldest timestamp is selected first to dequeue.