Input Receiver Circuit with Selective Differential Amplifier Activation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory signal receiver circuits consume significant power due to continuous operation, which is undesirable in low-power systems, despite their need for high data reliability and fast access speeds.
Innovation Solution
The implementation of a signal receiver circuit that activates differential amplifier circuits only during high-frequency mode, reducing power consumption by using a single differential amplifier circuit when the high-frequency mode is not enabled, and employing a resistive load or high impedance in other modes to minimize power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If differential amplifier circuits remain active continuously to receive asynchronous input signals, then data reliability and access speed are improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the differential amplifier circuit's operational state changeable between active and inactive modes based on input signal characteristics. The circuit transitions from continuous operation to selective activation, adapting its state to match the actual need for signal reception while maintaining reliability when required.
Solution Approach 2:
The patent implements periodic action by activating the differential amplifier circuit only during specific periods when asynchronous input signals are detected, rather than maintaining continuous operation. This selective activation during needed intervals reduces power consumption while ensuring data reliability is maintained when signals are present.
2Speed
If differential amplifier circuits remain active continuously, then access speed is improved, but power consumption increases
Solution Approach 1:
The circuit dynamically adjusts its operational state based on the presence of input signals, transitioning between active and inactive states. This dynamic behavior maintains fast access speed when signals are received while minimizing power consumption during idle periods.
Solution Approach 2:
The patent extracts the essential function of signal amplification and separates it from continuous operation. By taking out the amplification function and activating it only when needed, the system maintains access speed performance while eliminating unnecessary power consumption during idle periods.
3Use of energy by moving object
If a single differential amplifier circuit is used instead of multiple circuits, then power consumption is reduced, but ability to accommodate wide range of input signals may be limited
Solution Approach 1:
The single differential amplifier circuit is designed to perform multiple functions by accommodating a wide range of input signal types including asynchronous signals, differential signals, and various voltage levels. This universal design allows one circuit to replace multiple specialized circuits while maintaining versatility and reducing power consumption.
Solution Approach 2:
The circuit achieves adaptability through parameter changes by adjusting its operational characteristics based on the type of input signal received. By changing parameters such as gain, input impedance, and reference voltage levels, the single circuit can accommodate diverse signal types while maintaining low power consumption.
Data Source
AI summary
Apparatuses and methods for input signal receiver circuits are disclosed. An example apparatus includes an amplifier stage configured to receive a reference voltage and an input signal. The amplifier stage is configured to provide in a first mode a first output having a complementary logic level to the input signal and a second output having a same logic level to the input signal and is further configured to provide in a second mode the first output unrelated to the input signal and the second output having a same logic level to the input signal. The example apparatus further includes a pull-up circuit and a pull-down circuit. The pull-up circuit is configured to provide a high logic level voltage to a common node when activated by the first output. The pull-down circuit is configured to provide a low logic level voltage to the common node when activated by the second output.