Input Swapping in Adder Trees for Sparse Neural Computation

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Solution Overview

Problem

Neural network computations face high input sparsity, leading to excessive energy consumption in adder trees due to the high number of active adders, as conventional methods do not effectively handle sparse inputs.

Innovation Solution

A computation apparatus and method involving input swapping, utilizing a non-zero detection circuit, swapper policy circuit, and swapper matrix circuit to consolidate non-zero operands, reducing the number of active adders and energy consumption by rearranging operands in the adder tree.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional adder trees are used for neural network computations, then the computation can be performed, but the energy consumption is excessive due to high number of active adders caused by input sparsity

Engineering Contradiction:
Improveenergy consumptionVSAvoidcomputation efficiency
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent applies preliminary action by detecting non-zero operands before the adder tree computation and swapping them to specific positions in advance. This preprocessing step consolidates non-zero values to positions that minimize active adder usage, thereby reducing energy consumption before the actual computation begins.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the arrangement parameter of input operands by swapping non-zero elements to specific positions. This parameter change optimizes the input distribution to the adder tree, reducing the number of active adders and consequently lowering energy consumption while maintaining computation accuracy.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If input swapping is implemented to reduce active adders, then energy consumption decreases, but device complexity increases due to additional circuits

Engineering Contradiction:
Improveenergy consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent segments the input processing into distinct functional modules: a non-zero detection circuit that identifies non-zero operands, a swapper policy circuit that determines swapping operations, and a swapper matrix circuit that executes the swaps. This segmentation allows each module to perform a specific function efficiently, reducing overall complexity compared to a monolithic design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary circuits (detection circuit, policy circuit, swapper matrix) that mediate between the raw input and the adder tree. These intermediaries process the input data to optimize it for energy-efficient computation, acting as a bridge that transforms irregular sparse inputs into optimized formats without requiring complete redesign of the adder tree structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240086155A1Computation method and computation apparatus with input swapping
Publication Date: 2024.03.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240086155A1 patent drawing
  • US20240086155A1 patent drawing
  • US20240086155A1 patent drawing

AI summary

A computation apparatus and a computation method with input swapping are provided. The computation apparatus includes a non-zero detection circuit, a swapper policy circuit, a swapper matrix circuit, and an adder tree. The non-zero detection circuit is configured to receive input vectors, inspect non-zero operands in the input vectors and generate a non-zero indicative signal indicating the non-zero operands. The swapper policy circuit is configured to receive and interpret the non-zero indicative signal, and generate multiplexer (MUX) selection signals for swapping the non-zero operands according to a set of swapping policies. The swapper matrix circuit is configured to receive the input vectors and the MUX selection signal, and perform swapping on operands in the input vectors according to the MUX selection signal. The adder tree is configured to receive the input vectors with the swapped operands and perform additions on the input vectors to output a computation result.