In-Memory Sort via Sensing Circuitry
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Solution Overview
Problem
Existing memory systems require significant power and time to perform sort operations by transferring data between memory arrays and processing resources, limiting efficiency and parallel processing capabilities.
Innovation Solution
The implementation of sensing circuitry within the memory array to perform sort operations without transferring data via I/O lines, allowing for parallel execution of comparison and swap operations directly within the memory array, reducing the need for external processing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data is transferred between memory arrays and processing resources to perform sort operations, then sort operations can be performed using external processing resources, but power consumption and operation time increase significantly
Solution Approach 1:
The patent merges the sort operation functionality directly into the memory array by integrating sensing circuitry with memory cells. The sensing circuitry performs comparison and swap operations on data stored in the memory array without requiring data transfer to external processing resources, thus reducing power consumption while maintaining sort operation capability.
Solution Approach 2:
The memory array becomes self-sufficient by performing sort operations internally using its own sensing circuitry. The sensing circuitry compares data values stored in memory cells and performs swaps directly within the array, eliminating the need for external processing resources and reducing power consumption associated with data transfer and external processing.
2Adaptability or versatility
If data is transferred between memory arrays and processing resources to perform sort operations, then sort operations can be performed using external processing resources, but operation time increases
Solution Approach 1:
The patent merges the sort operation functionality directly into the memory array by integrating sensing circuitry with memory cells. The sensing circuitry performs comparison and swap operations on data stored in the memory array without requiring data transfer to external processing resources, thus reducing operation time while maintaining sort operation capability.
Solution Approach 2:
The memory array becomes self-sufficient by performing sort operations internally using its own sensing circuitry. The sensing circuitry compares data values stored in memory cells and performs swaps directly within the array, eliminating the time required for data transfer to and from external processing resources.
3Productivity
If sensing circuitry is integrated within the memory array to perform sort operations, then power consumption and operation time are reduced, but device complexity increases
Solution Approach 1:
The sensing circuitry is designed to perform multiple functions: traditional data sensing/readout operations and sort operations (comparison and swap). This multi-functionality allows the memory array to perform sort operations internally without requiring separate dedicated circuitry, thus reducing the increase in device complexity while improving productivity.
4Adaptability or versatility
If data is transferred via I/O lines for sort operations, then external processing resources can be utilized, but parallel processing capabilities are limited
Solution Approach 1:
The patent segments the sort operation into individual comparison and swap operations that can be performed in parallel on multiple data elements simultaneously within the memory array. Each sensing circuitry unit can operate independently on different data pairs, enabling parallel processing without requiring data transfer via I/O lines to external processing resources.
Data Source
AI summary
Examples of the present disclosure provide apparatuses and methods related to performing a sort operation in a memory. An example apparatus might include a a first group of memory cells coupled to a first sense line, a second group of memory cells coupled to a second sense line, and a controller configured to control sensing circuitry to sort a first element stored in the first group of memory cells and a second element stored in the second group of memory cells by performing an operation without transferring data via an input/output (I/O) line.