In-Situ Doped Gate Electrodes for Wide Bandgap Power Devices

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Solution Overview

Problem

Wide bandgap semiconductor power devices face reliability issues due to dopant atom accumulation and diffusion caused by traditional doping treatments, leading to gate to source bias leakage and threshold voltage shifts, which affect performance and reliability.

Innovation Solution

In-situ doping of semiconductor gate electrodes during formation, followed by controlled annealing to activate dopant atoms, reduces dopant accumulation and diffusion, improving the distribution and activation of dopants within the gate electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional doping treatment (phosphoryl chloride) is used to dope polysilicon gate electrode, then gate electrode conductivity is improved, but dopant accumulation and diffusion occur causing reliability degradation

Engineering Contradiction:
Improvedevice reliabilityVSAvoiddopant distribution control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by incorporating dopant atoms directly into the polysilicon layer during the deposition process itself, rather than performing doping treatment after the gate electrode is formed. This in-situ doping approach prevents subsequent dopant diffusion and accumulation that would otherwise occur during post-formation doping treatments, thereby maintaining both conductivity and reliability without compromising manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the harmful post-formation doping treatment step (phosphoryl chloride treatment) from the manufacturing process. By removing this separate doping step and replacing it with in-situ doping during deposition, the patent eliminates the source of dopant accumulation and diffusion that degrades device reliability, while still achieving the necessary gate electrode conductivity

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If phosphoryl chloride treatment is applied to dope polysilicon gate electrode, then conductivity is enhanced, but dopant atoms diffuse into gate dielectric causing performance degradation

Engineering Contradiction:
Improvegate oxide reliabilityVSAvoiddopant diffusion into dielectric
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by incorporating dopant atoms directly into the polysilicon layer during the deposition process itself, rather than performing doping treatment after the gate electrode is formed. This in-situ doping approach prevents subsequent dopant diffusion and accumulation that would otherwise occur during post-formation doping treatments, thereby maintaining both conductivity and reliability without compromising manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the harmful post-formation doping treatment step (phosphoryl chloride treatment) from the manufacturing process. By removing this separate doping step and replacing it with in-situ doping during deposition, the patent eliminates the source of dopant accumulation and diffusion that degrades device reliability, while still achieving the necessary gate electrode conductivity

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If thermal annealing is performed after gate dielectric formation, then dopant activation is improved, but bulk trap sites are created in gate dielectric causing threshold voltage shifts

Engineering Contradiction:
Improvedevice stabilityVSAvoidbulk trap sites in dielectric
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by incorporating dopant atoms directly into the polysilicon layer during the deposition process itself, rather than performing doping treatment after the gate electrode is formed. This in-situ doping approach prevents subsequent dopant diffusion and accumulation that would otherwise occur during post-formation doping treatments, thereby maintaining both conductivity and reliability without compromising manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the harmful post-formation doping treatment step (phosphoryl chloride treatment) from the manufacturing process. By removing this separate doping step and replacing it with in-situ doping during deposition, the patent eliminates the source of dopant accumulation and diffusion that degrades device reliability, while still achieving the necessary gate electrode conductivity

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in wide bandgap semiconductor power devices with reduced surface dopant accumulation, improved reliability, and enhanced performance by minimizing dopant diffusion into the gate dielectric, leading to lower sheet resistance and smoother surfaces.

Implementation Method 1

forming a semiconductor layer directly over the gate dielectric layer while using in-situ doping to incorporate a plurality of dopant atoms in the semiconductor layer

Methodology Applied
Scientific EffectIn-situ doping: Chemical Vapour Deposition

Implementation Method 2

annealing the semiconductor gate electrode to activate the plurality of dopant atoms

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 3

forming a metal-containing layer directly over the semiconductor layer

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS10573722B2Systems and methods for in-situ doped semiconductor gate electrodes for wide bandgap semiconductor power devices
Publication Date: 2020.02.25 GENERAL ELECTRIC CO
  • US10573722B2 patent drawing
  • US10573722B2 patent drawing
  • US10573722B2 patent drawing

AI summary

In an embodiment, a wide bandgap semiconductor power device, includes a wide bandgap semiconductor substrate layer; an epitaxial semiconductor layer disposed above the wide bandgap semiconductor substrate layer; a gate dielectric layer disposed directly over a portion of the epitaxial semiconductor layer; and a gate electrode disposed directly over the gate dielectric layer. The gate electrode includes an in-situ doped semiconductor layer disposed directly over the gate dielectric layer and a metal-containing layer disposed directly over the in-situ doped semiconductor layer.