Semiconductor Pattern Inspection Map Layout to Avoid Redundant Measurements

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing complexity and fineness of semiconductor patterns make existing inspection methods more time-consuming and less reliable, leading to difficulties in detecting defects during semiconductor fabrication.

Innovation Solution

An inspection method and system that generates a third measurement map by selecting a second measurement region at the center of overlapping preliminary measurement regions, reducing the number of measurement regions and avoiding duplicate inspections, allowing for faster and more reliable pattern inspection on semiconductor substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple preliminary measurement regions are provided on corresponding measurement points, then measurement coverage is improved, but inspection time increases due to redundant overlapping measurements

Engineering Contradiction:
Improveinspection reliabilityVSAvoidinspection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges overlapping measurement regions by grouping preliminary measurement regions that overlap in the two-dimensional plan view into a single polygon, then selecting one representative second measurement region at the center of the polygon. This combining approach maintains comprehensive measurement coverage while eliminating redundant inspections, thereby improving inspection reliability without proportionally increasing inspection time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the measurement process into distinct stages: first generating non-overlapping first measurement regions, then providing overlapping preliminary measurement regions on measurement points, grouping overlapping regions into polygons, and finally selecting representative second measurement regions. This segmentation allows systematic management of measurement coverage and redundancy, optimizing the balance between reliability and time efficiency.

Inventive Principle:
Principle #1Segmentation

2Reliability

If comprehensive measurement coverage is provided through overlapping measurement regions, then defect detection reliability is improved, but the complexity of measurement map generation increases

Engineering Contradiction:
Improvedefect detection reliabilityVSAvoidmeasurement map generation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by first providing a pattern layout with measurement points, then generating first measurement regions that overlap measurement points without overlapping each other. Subsequently, preliminary measurement regions are provided on measurement points, and overlapping regions are grouped into polygons before selecting final measurement regions. This preliminary structuring simplifies the overall measurement map generation process while ensuring comprehensive coverage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent transitions from a two-dimensional plan view of overlapping measurement regions to a simplified representation by grouping overlapping regions into polygons and selecting representative regions at polygon centers. This dimensional transformation reduces complexity by converting a complex overlapping two-dimensional arrangement into a simplified set of non-overlapping representative regions while preserving measurement coverage.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12055861B2Inspection method, inspection system, and semiconductor fabrication using the same
Publication Date: 2024.08.06 SAMSUNG ELECTRONICS CO LTD
  • US12055861B2 patent drawing
  • US12055861B2 patent drawing
  • US12055861B2 patent drawing

AI summary

Provided is an inspection method including providing a pattern layout including measurement points, generating a first measurement map including first measurement regions that overlap the measurement points and do not overlap each other in a two-dimensional plan view, providing preliminary measurement regions on the measurement points, producing a polygon by grouping ones of the preliminary measurement regions that overlap each other in the two-dimensional plan view, providing a second measurement region on a center of the polygon, selecting the second measurement region when all of the measurement points in the polygon overlap the second measurement region in the two-dimensional plan view, generating a second measurement map including the selected second measurement region, generating a third measurement map by using the first and second measurement maps, and inspecting patterns on a semiconductor substrate by using the third measurement map. The third measurement map includes the selected second measurement region and ones of the first measurement regions that do not overlap the selected second measurement region in the two-dimensional plan view.