Instruction Cache Controller Boundary Handling
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Solution Overview
Problem
The use of variable-length instructions in microprocessors leads to performance penalties due to the need for additional cache reads when instructions cross cache boundaries, as conventional caches require separate accesses for pre- and post-boundary instruction data, negatively impacting caching efficiency.
Innovation Solution
An instruction cache controller uses supplemental memory to store redundant copies of instruction data at cache boundary positions, allowing for single-access retrieval of misaligned instructions by combining pre-boundary data from the cache with post-boundary data from auxiliary memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If variable-length instructions are stored in non-aligned memory to reduce instruction memory footprint, then memory space efficiency is improved, but cache retrieval performance deteriorates due to requiring multiple cache accesses for cross-boundary instructions
Solution Approach 1:
The patent stores redundant copies of instruction data at cache boundary positions in advance. When an instruction crosses a cache boundary, the trailing portion is already available in the supplemental memory structure, eliminating the need for a second cache access and reducing retrieval time while maintaining non-aligned storage efficiency
2Speed
If conventional caches use aligned memory organization with natural word boundaries, then cache access speed is improved, but memory space efficiency deteriorates for variable-length instruction sets
Solution Approach 1:
The patent segments the cache system into a main cache structure for aligned storage and a supplemental memory structure for boundary data. This segmentation allows the main cache to maintain fast aligned access while the supplemental structure handles the space-efficient non-aligned variable-length instruction storage, combining both benefits
Data Source
AI summary
An instruction cache controller uses supplemental memory to store a redundant copy of cached instruction data corresponding to a cache boundary position, and thereby enables subsequent single cache access retrieval of an instruction that crosses that boundary position. In one or more embodiments, the cache controller duplicates instruction data for the post-boundary position in the supplemental memory, and multiplexes that copied data into cache data obtained from the pre-boundary position.