Instruction Conflict Execution via Dependency Flags
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Solution Overview
Problem
Existing methods for executing instructions in processors, particularly in GPUs, face inefficiencies due to the complexity of compiler work, difficulty in locating source conflicts, and the introduction of waiting clock cycles, which reduce execution efficiency and increase total execution time.
Innovation Solution
An execution method for instruction conflicts is introduced, which involves obtaining instructions to be executed in waves, determining whether an instruction meets emission conditions, determining the type of instruction, issuing the instruction for execution, and executing the operation. This method utilizes dependency flags to manage register access and resolve conflicts, thereby simplifying the compiler's work and improving execution efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If check instructions are generated in advance to ensure register access order, then instruction execution order is guaranteed, but instructions without conflicts cannot be sent immediately, introducing waiting clock cycles and reducing execution efficiency
Solution Approach 1:
The patent applies preliminary action by pre-calculating and recording dependency relationships between instructions during compilation. The compiler analyzes instruction sequences, identifies register access conflicts, and stores dependency information in a dependency table before runtime execution. This allows the runtime system to quickly determine whether instructions can be executed without waiting, eliminating the need for conservative check instructions on all instructions.
Solution Approach 2:
The patent implements self-service by enabling the instruction execution unit to autonomously determine execution timing using pre-stored dependency information. Each instruction carries metadata about its register dependencies, and the execution unit consults the dependency table to self-determine whether it can proceed without waiting for previous instructions to complete, eliminating the need for external check instructions.
2Reliability
If wait-flags are set on instructions with longer execution times and check instructions are generated, then register access conflicts are resolved, but the total execution time of instructions in each wave is increased due to additional clock cycles
Solution Approach 1:
The patent extracts the dependency analysis function from the runtime execution system and relocates it to the compilation phase. The compiler extracts dependency relationships between instructions and stores them in a dependency table, separating the conflict detection task from the execution timeline. This allows runtime execution to proceed efficiently using pre-computed dependency information without adding check instructions that consume execution time.
Solution Approach 2:
The patent introduces a dependency table as an intermediary structure that mediates between instruction sequences and execution timing. Instead of using check instructions as intermediaries to enforce ordering, the dependency table provides pre-analyzed conflict information that allows the execution unit to make informed timing decisions without inserting additional instruction cycles.
3Reliability
If check instructions are generated before conflicting instructions, then register access order is ensured, but the complexity of compiler work is increased and accurate location of check instruction sources becomes difficult
Solution Approach 1:
The patent replaces the mechanical approach of inserting check instructions at conflict points with an information-based approach using dependency tables. Instead of modifying the instruction stream with additional check operations, the compiler generates a separate dependency metadata structure that encodes ordering requirements. This substitution simplifies compiler logic by using systematic dependency analysis rather than complex check instruction insertion heuristics.
Data Source
AI summary
An execution method for instruction conflict, includes: obtaining instructions to be executed in waves; determining whether a first instruction of a first wave meets one or more instruction emission conditions; determining, based on the first instruction meeting the one or more instruction emission conditions, a type of the of the first instruction; issuing, based on the type being a second type, the first instruction to be executed; and executing an operation of the first instruction.