Instruction Decoder Null Address Preload Suppression

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Solution Overview

Problem

Data processing systems face inefficiencies and increased energy consumption due to unnecessary preload operations triggered by memory addresses that will not be accessed, which can obstruct other operations and waste resources.

Innovation Solution

An apparatus and method where an instruction decoder compares memory addresses specified in preload instructions with a null value, suppressing the preload operation if a match is found, thereby saving energy and improving efficiency by avoiding unnecessary operations such as page table walks and cache loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If preload operations are performed for all memory addresses specified in preload instructions, then subsequent memory access speed is improved, but energy consumption increases and other data processing operations are obstructed

Engineering Contradiction:
Improvesubsequent memory access speedVSAvoidenergy consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent performs preliminary comparison of the memory address with null value before executing the preload operation. This preliminary action identifies and suppresses unnecessary preload operations, preventing wasted energy consumption while maintaining the speed benefit for valid memory addresses that actually require preloading.

Inventive Principle:
Principle #10Preliminary action

2Speed

If preload operations are performed for all memory addresses specified in preload instructions, then subsequent memory access speed is improved, but other data processing operations are obstructed

Engineering Contradiction:
Improvesubsequent memory access speedVSAvoiddata processing efficiency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The instruction decoder performs a preliminary comparison of the memory address with null value before triggering the preload operation. This preliminary check identifies and suppresses unnecessary preload operations that would obstruct other data processing operations, thereby maintaining productivity while preserving the speed benefit for valid memory addresses.

Inventive Principle:
Principle #10Preliminary action

3Loss of energy

If preload operations are suppressed for certain memory addresses, then energy consumption is reduced and data processing efficiency is improved, but the preload functionality becomes less comprehensive

Engineering Contradiction:
Improveenergy wasteVSAvoidpreload operation coverage
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent extracts and identifies the null value condition from the memory address, separating necessary preload operations from unnecessary ones. By taking out the null value case, the system reduces energy waste while maintaining comprehensive preload functionality for all valid memory addresses that actually require preloading.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9632776B2Preload instruction control
Publication Date: 2017.04.25 ARM LTD
  • US9632776B2 patent drawing
  • US9632776B2 patent drawing
  • US9632776B2 patent drawing

AI summary

A processor provided with an instruction decoder responsive to preload instructions which trigger preload operations, such as page table walks and cache line fetches. An instruction decoder identifies if the memory address associated with the preload instruction matches a null value and suppresses the preload operation if the memory address does match the null value. The null value may be set under program control, it may be predetermined as a fixed value (e.g. zero) or may be set under hardware control, such as corresponding to memory addresses of a page identified by a memory management unit as non-accessible.