Instruction Execution Control with Dynamic Interception

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Solution Overview

Problem

Current data processors lack an efficient mechanism for dynamically intercepting and handling specific instructions during program execution, particularly when resources are unavailable, leading to potential performance issues and increased overhead in handling special cases.

Innovation Solution

A method and apparatus that associate instructions with indications for interception, allowing the execution unit to determine whether to issue instructions directly for hardware execution or pause and perform alternative operations, facilitating dynamic interception and special handling with low overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If instructions are always issued directly to hardware units for execution, then execution speed is improved, but the ability to dynamically intercept and handle specific instructions is lost

Engineering Contradiction:
Improveinstruction execution speedVSAvoiddynamic instruction interception capability
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The system pre-associates indication information with instructions before execution. The execution unit checks this indication information during the decoding phase, allowing it to determine in advance whether an instruction should be intercepted or executed directly by hardware, thus maintaining high execution speed while enabling selective interception capability.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If instructions are intercepted and handled by the execution unit, then special treatment capability is improved, but execution overhead increases

Engineering Contradiction:
Improvespecial instruction handling capabilityVSAvoidinstruction execution overhead
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The instruction execution process is segmented into two paths: a fast path for normal instructions that are executed directly by hardware units, and a special path for intercepted instructions that require execution unit handling. The indication information acts as a branch predictor, allowing the system to quickly determine which path to take without extensive checking overhead for every instruction.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If a microcontroller is used to emulate instruction execution, then flexibility is improved, but execution speed decreases

Engineering Contradiction:
Improveinstruction execution flexibilityVSAvoidinstruction execution speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The system dynamically selects the execution path for each instruction based on its indication information. Commonly executed instructions are configured to execute directly on hardware units for high speed, while less common instructions that require special handling are routed to the execution unit or microcontroller for emulation. This dynamic routing optimizes overall execution performance while maintaining flexibility.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10846088B2Control of instruction execution in a data processor
Publication Date: 2020.11.24 ARM LTD
  • US10846088B2 patent drawing
  • US10846088B2 patent drawing
  • US10846088B2 patent drawing

AI summary

When executing a program on a data processor comprising an execution unit for executing instructions in a program to be executed by the data processor, the execution unit being associated with one or more hardware units operable to execute instructions, at least one instruction in a program is associated with an indication of whether the instruction should be issued directly for execution by a hardware unit or should be intercepted during its execution by the execution unit. The execution unit then, when decoding the instruction for execution by a hardware unit in the program, determines from the indication associated with the instruction whether the instruction should be issued directly for execution by a hardware unit or intercepted during its execution by the execution unit, and issues the instruction for execution by a hardware unit directly, or pauses execution of the instruction and performs another operation, accordingly.