Instruction Flagging Circuit for Conditional Branch Pipeline Control
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Solution Overview
Problem
When a processor processes instructions using a pipeline and predicts a conditional branch instruction incorrectly, it often flushes the pipeline to re-read correct instructions, leading to performance degradation.
Innovation Solution
An instruction flagging circuit is introduced to detect conditional branch instructions and set flags for non-jump instructions, allowing the processor to execute the correct instructions based on the branch direction, reducing pipeline flushes and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the processor uses pipeline processing for instructions, then the processing speed is improved, but when a predicted jump result of a conditional branch instruction is incorrect, the pipeline must be flushed causing performance degradation
Solution Approach 1:
The instruction flagging circuit performs preliminary analysis on to-be-processed instructions before they enter the pipeline, setting flags on non-jump instructions that should be executed regardless of branch outcomes. This preliminary action ensures that when a conditional branch instruction jumps, the flagged non-jump instructions can be executed without requiring a pipeline flush, thus maintaining pipeline continuity and preventing performance degradation while preserving processing speed
2Reliability
If the processor flushes the pipeline when a predicted jump result is incorrect, then the correct instructions are re-read, but this causes degradation in processing performance
Solution Approach 1:
The instruction flagging circuit extracts and identifies non-jump instructions from the to-be-processed instructions that should be executed unconditionally. By setting execution flags on these extracted instructions, the system separates the execution path determination from the pipeline flush mechanism, allowing correct instructions to be executed without flushing the pipeline, thus maintaining both execution correctness and processor performance
3Device complexity
If the processor executes to-be-processed instructions in the pipeline without flagging, then the device complexity is low, but the probability of incorrect execution increases when branch prediction fails
Solution Approach 1:
The instruction flagging circuit acts as an intermediary between the instruction fetch unit and the pipeline execution unit. It analyzes to-be-processed instructions and sets execution flags on non-jump instructions that should be executed regardless of branch outcomes. This intermediary layer adds minimal complexity while significantly improving execution accuracy by ensuring the correct instructions are executed when branch prediction fails, without requiring complex pipeline control logic
Data Source
AI summary
An instruction flagging circuit includes: a first instruction detection sub-circuit for performing instruction detection on to-be-processed instructions to obtain a first detection result, wherein the first detection result includes a first conditional branch instruction and at least one non-jump instruction of the to-be-processed instructions, a jump range of the first conditional branch instruction is within a first range, and the non-jump instruction is to be executed when the first conditional branch instruction does not jump; and a first instruction flagging sub-circuit for setting, according to the first detection result, instruction flags for the first conditional branch instruction and the non-jump instruction to obtain target flagged instructions. The target flagged instructions indicate an instruction execution circuit to execute the non-jump instruction including the instruction flag when it is determined that the first conditional branch instruction jumps.