Instruction Issue Control Unit Throttling for Voltage Droop
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Solution Overview
Problem
Computer chips experience voltage droop due to sudden increases in power demand when instruction issue units rapidly issue instructions, potentially leading to reduced performance or failure if the voltage drops below a minimum required level.
Innovation Solution
A method is implemented to control the instruction issue rate by maintaining a history buffer of instruction issuance rates, throttling the instruction issue unit when the sum of issued instructions exceeds a threshold, and gradually increasing the allowed instruction rate to prevent sudden spikes in power draw.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the instruction issue unit issues a significant number of instructions over a short period of time to increase processing throughput, then productivity is improved, but voltage droop occurs due to sudden increased power demand
Solution Approach 1:
The patent implements periodic action by using a history buffer to track instruction issue rates over multiple cycles and applying throttling at specific intervals when thresholds are exceeded. This converts continuous high-rate instruction issuing into a regulated periodic pattern, allowing the system to maintain high average throughput while preventing sudden power spikes that cause voltage droop.
Solution Approach 2:
The patent applies preliminary action by monitoring and tracking the instruction issue rate in advance using a history buffer before voltage droop occurs. The threshold comparison and throttling decision are made proactively based on predicted power demand, preventing the harmful effect rather than reacting to it after it occurs.
2Reliability
If the instruction issue rate is throttled to prevent voltage droop, then voltage stability is improved, but processing throughput decreases
Solution Approach 1:
The patent applies partial action by implementing selective throttling rather than complete inhibition. The history buffer tracks the actual instruction issue rate and compares it against a threshold, allowing the system to throttle only when necessary (when the sum of recent instruction counts exceeds the threshold) while permitting full instruction throughput during normal conditions. This partial application of throttling maintains voltage stability without unnecessarily reducing productivity.
3Reliability
If the number of instructions issued is gradually increased to a maximum value, then voltage droop is avoided, but the time to reach maximum throughput increases
Solution Approach 1:
The patent applies dynamics by implementing an adaptive threshold mechanism where the instruction issue threshold is not fixed but dynamically adjusted based on the moving average of recent instruction rates stored in the history buffer. This allows the system to gradually increase the allowed instruction rate as the moving average increases, enabling the processor to reach maximum throughput more quickly while still preventing voltage droop through adaptive regulation rather than rigid limiting.
Data Source
AI summary
An issue control unit is configured to control the rate at which an instruction issue unit issues instructions to an execution pipeline in order to avoid spikes in power drawn by that execution pipeline. The issue control unit maintains a history buffer that reflects, for N previous cycles, the number of instructions issued during each of those N cycles. If the total number of instructions issued during the N previous cycles exceeds a threshold value, then the issue control unit throttles the instruction issue unit from issuing instructions during a subsequent cycle. In addition, the issue control unit increases the threshold value in proportion to the number of previously issued instructions and based on a variety of configurable parameters. Accordingly, the issue control unit maintains granular control over the rate with which the instruction issue unit “ramps up” to a maximum instruction issue rate.