Instruction Message Queue Synchronization for Operand Data
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Solution Overview
Problem
Existing dataflow architectures face challenges in synchronizing operand data for computation across processing device elements, leading to inefficiencies and substantial storage requirements due to individual buffering of operand data.
Innovation Solution
A processing device with a message management facility and a message processing facility that utilizes shared queues to manage instruction messages and operand data, allowing for efficient synchronization and reduced storage needs by sharing buffer space among processing device elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each processing device element buffers operand data individually, then synchronization of operand data is achieved, but storage space requirements increase substantially
Solution Approach 1:
The patent merges the buffering functionality from individual processing device elements into a single shared buffer space. Instead of each PE maintaining its own queue, all PEs share a common buffer managed by a buffer manager, reducing total storage requirements while maintaining synchronization through coordinated access control.
Solution Approach 2:
The buffer manager acts as an intermediary between multiple processing device elements and the shared buffer space. It manages the buffer resources, coordinates access from multiple PEs, and ensures proper synchronization without requiring each PE to maintain its own buffer, thus resolving the storage space issue.
2Manufacturing precision
If processing device elements wait for synchronized operand data, then computation accuracy is maintained, but processing time increases
Solution Approach 1:
The shared buffer system enables continuous operation by allowing processing device elements to proceed as soon as required operands are available in the shared buffer, rather than waiting for all operands to arrive. The buffer manager ensures operands are prepared and made available efficiently, reducing idle waiting time while maintaining computation accuracy through proper data synchronization mechanisms.
3Reliability
If operand data is buffered in processing device elements, then data availability is ensured, but device complexity increases
Solution Approach 1:
The buffering functionality is extracted from individual processing device elements and consolidated into a centralized buffer managed by a buffer manager. This separation reduces the complexity within each PE while maintaining data availability, as the buffer manager handles the complex coordination of data storage and retrieval across multiple PEs.
Data Source
AI summary
A processing device may include a message management facility and a message processing facility. The message management facility comprises a first message queue for receiving new instruction messages and a second message queue for receiving rejected instruction messages. The message processing facility receives a first instruction message and a second instruction message from the message management facility. The first instruction message is rejected and returned to the message management facility to add the first instruction message to the second message queue in response to determining that the first instruction message cannot be accepted by a processing device element identified in the first instruction message. Operand data for an input port of a processing device element identified in the second instruction message is retrieved in response to determining that the second instruction message can be accepted by the processing device element identified in the second instruction message.