Dynamic Instruction Priority Tagging for Resource Allocation

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Solution Overview

Problem

Conventional data processing systems face challenges in optimizing instruction thread execution in multiprocessor systems due to inefficient allocation of system resources, as software-based schedulers and workload managers struggle to address low-level performance issues and make optimal decisions about resource allocation among multiple threads, leading to tradeoffs that can decrease efficiency.

Innovation Solution

A dynamic instruction prioritization system where instructions are tagged with priority values, allowing for efficient allocation of system resources based on thread performance evaluation, with priority values propagated throughout the processor system to make resource allocation decisions dynamically, eliminating the need for separate thread registers at each hardware unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If software-based schedulers and workload managers are used to allocate system resources, then high-level performance issues can be monitored and addressed, but low-level performance issues such as hardware allocation of shared resources among multiple threads cannot be effectively addressed

Engineering Contradiction:
Improveperformance monitoring capabilityVSAvoidresource allocation effectiveness
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent combines software-based scheduling with hardware-based resource allocation by integrating priority tags into the instruction stream that flows from software to hardware. The hardware components (cache controllers, memory controllers, I/O controllers) read these tags and automatically allocate resources accordingly, merging the capabilities of both software monitoring and hardware execution.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The priority tag acts as an intermediary mechanism that bridges software schedulers and hardware resource allocators. The operating system or application sets priority values that are attached to instruction streams, and these tags are then used by hardware components to make real-time allocation decisions without requiring complex software intervention at each hardware access point.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If a single a priori correct decision algorithm is selected for majority of workloads, then resource allocation can be simplified, but tradeoffs are made that give priority to certain operations at the expense of others, decreasing efficiency when the wrong priority is assumed

Engineering Contradiction:
Improveresource allocation algorithmVSAvoidinstruction stream execution efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements dynamic priority assignment where priority values are not fixed but can be changed during system operation. The operating system or application can adjust priority tags based on current workload conditions, allowing the system to adapt to different scenarios without requiring multiple specialized algorithms. This dynamic approach replaces static a priori decisions with flexible runtime adjustments.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If separate thread registers are maintained at each hardware unit to track thread priorities, then resource allocation decisions can be made based on thread priority, but system complexity and resource overhead increase significantly

Engineering Contradiction:
Improveresource allocation decision-makingVSAvoidhardware structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts the priority information from separate hardware registers and embeds it directly into the instruction stream itself through priority tags. Instead of maintaining separate thread priority registers at each hardware unit, the priority information travels with the instructions, eliminating the need for complex distributed register structures while still enabling priority-based resource allocation.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8886918B2Dynamic instruction execution based on transaction priority tagging
Publication Date: 2014.11.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8886918B2 patent drawing
  • US8886918B2 patent drawing
  • US8886918B2 patent drawing

AI summary

A method, system and program are provided for dynamically assigning priority values to instruction threads in a computer system based on one or more predetermined thread performance tests, and using the assigned instruction priorities to determine how resources are used in the system. By storing the assigning priority values for each thread as a tag in the thread's instructions, tagged instructions from different threads that are dispatched through the system are allocated system resources based on the tagged priority values assigned to the respective instruction threads. Priority values for individual threads may be updated with control software which tests thread performance and uses the test results to apply predetermined adjustment policies. The test results may be used to optimize the workload allocation of system resources by dynamically assigning thread priority values to individual threads using any desired policy, such as achieving thread execution balance relative to thresholds and to performance of other threads, reducing thread response time, lowering power consumption, etc.