Instruction Queue Dependency Handling for Asynchronous Task Execution

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Solution Overview

Problem

In complex task execution scenarios, the determination of data dependency between multiple execution units results in a significant load on compilers, leading to reduced processing efficiency due to the need for numerous determining instructions to ensure correct pairing of trigger and wait instructions.

Innovation Solution

A task processing method utilizing relationship identifiers to indicate data dependency relationships and restriction instructions at the head of instruction queues, allowing asynchronous execution without the need for extensive determining statements, thereby simplifying code and reducing compiler load.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If trigger instructions and wait instructions are paired between different execution units to ensure correct task execution timing, then task execution accuracy is improved, but the number of determining instructions increases significantly, leading to increased compiler load and reduced processing efficiency

Engineering Contradiction:
Improvetask execution accuracyVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a timestamp as an intermediary mechanism to mediate the synchronization between execution units. Instead of using complex trigger-wait instruction pairs that require multiple determining instructions, each task is assigned a timestamp that automatically controls its execution timing. The timestamp acts as a mediator that carries the necessary synchronization information, eliminating the need for extensive determining instructions while ensuring tasks execute at the correct occasions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If numerous determining instructions are added to handle complex task execution logic and multiple data dependency conditions, then task execution correctness is improved, but compiler complexity and processing overhead increase significantly

Engineering Contradiction:
Improvetask execution correctnessVSAvoidcompiler complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter used for task synchronization from complex control flow instructions to a simple timestamp parameter. By representing task execution timing as a numerical timestamp value, the system can handle complex data dependency conditions through simple parameter comparison and assignment operations. This parameter transformation simplifies the compiler's workload while maintaining execution correctness.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If multiple determining instructions are set for each condition to determine task execution status, then accurate pairing of trigger and wait instructions is improved, but the amount of determining during task processing increases, overburdening the compiler

Engineering Contradiction:
Improveinstruction pairing accuracyVSAvoidnumber of determining instructions
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent extracts the synchronization control logic from the instruction stream and encapsulates it in the timestamp parameter. By taking out the complex determining logic from the main task execution flow and embedding it in the timestamp assignment mechanism, the system reduces the number of determining instructions needed during task processing while maintaining accurate instruction pairing.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP4675428A1Task processing method and chip
Publication Date: 2026.01.07 HUAWEI TECH CO LTD
  • EP4675428A1 patent drawingFigure 1
  • EP4675428A1 patent drawingFigure 2
  • EP4675428A1 patent drawingFigure 3

AI summary

Embodiments of this application provide a task processing method and a chip, and relate to the field of computer technologies. The task processing method includes: separately placing, in a plurality of instruction queues that are in a one-to-one correspondence with a plurality of execution units, all instructions in an instruction sequence used to implement a task; determining, based on a relationship identifier corresponding to a restriction instruction at a head of a first instruction queue in the plurality of instruction queues, a processing status of a second instruction queue on which the first instruction queue depends in a data dependency relationship indicated by the relationship identifier; when the processing status is processing completed, extracting the restriction instruction corresponding to the relationship identifier from the first instruction queue, to execute an instruction after the restriction instruction, where the processing status is obtained by updating based on the relationship identifier; and completing processing of the plurality of instruction queues to obtain a processing result of the task. In embodiments of this application, load of a compiler during asynchronous execution of different tasks can be reduced, and task processing efficiency can be improved.