Instruction Retirement Unit Buffer Segmentation for Resource Reduction
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Solution Overview
Problem
The existing re-order buffer (ROB) in processing units with out-of-order execution architecture consumes significant hardware resources due to the need for a large number of instruction buffer table entries to maintain the execution order of instructions.
Innovation Solution
An instruction retirement unit and an instruction execution unit are introduced, which include a reception subunit, an arbitration subunit, and a retirement subunit. These units manage instruction completion and retirement by storing instruction completion information in a buffer with a number of entries greater than 1 and less than the out-of-order degree allowed by the processing unit, thereby reducing the resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a re-order buffer (ROB) is used to temporarily store execution results and restore instruction execution order, then the correctness of overall execution behavior is ensured, but the number of instruction buffer table entries must equal the out-of-order degree allowed by the processing unit, causing large consumption of hardware resources
Solution Approach 1:
The patent segments the instruction buffer into multiple smaller buffers, each buffer having fewer entries than the total out-of-order degree. This allows the system to maintain correctness while reducing the number of entries in each individual buffer, thereby reducing hardware resource consumption.
Solution Approach 2:
The patent introduces a new dimension of organization by using multiple buffers instead of a single large buffer. This dimensional change allows the system to achieve the same reliability function with reduced total entries by distributing instructions across multiple smaller storage structures.
2Quantity of substance
If the number of instruction buffer table entries is reduced to save hardware resources, then the consumption of hardware resources for instruction reordering is reduced, but the ability to maintain execution order during out-of-order processing is compromised
Solution Approach 1:
By dividing the instruction buffer into multiple smaller buffers, the system maintains the ability to track and restore instruction order while using fewer total entries. Each buffer handles a subset of instructions, and the combined system preserves overall execution order correctness.
Solution Approach 2:
The patent implements preliminary tracking of instruction completion information in the smaller buffers before retirement. This preliminary action enables the system to maintain execution order without requiring a large single buffer, as the completion tracking is prepared in advance in the segmented structure.
Data Source
AI summary
The embodiments of the present application provide an instruction retirement unit, an instruction execution unit, and a related apparatus and method. The instruction retirement unit includes: a reception subunit, configured to receive a completion request signal; an arbitration subunit, configured to send a completion permission signal to an instruction execution unit after determining that instructions to be completed can be completed, and store instruction completion information of the instructions to be completed into instruction buffer table entries in a buffer; and a retirement subunit, configured to perform, based on the instruction completion information stored in each of the instruction buffer table entries, retirement processing on instructions that have already been completed and have not been retired, and delete the instruction completion information of retired instructions from the instruction buffer table entries.