Instruction Tagging for Intra-Object Memory Safety
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Solution Overview
Problem
Existing memory safety and security approaches in computer systems require additional storage and performance impact, especially for fine-grained tagging, making them inefficient in protecting against software vulnerabilities like buffer overflows and dangling pointers.
Innovation Solution
The implementation of instruction tagging and tagged addressing, which uses unique tags for individual instructions and memory locations to differentiate between object instances and member variables, allowing for fine-grained protection with reduced storage and performance overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fine-grained memory tagging is implemented to protect against software vulnerabilities, then security and reliability are improved, but storage requirements and performance overhead increase
Solution Approach 1:
The patent divides memory protection into fine-grained segments at the object member level rather than coarse-grained whole-object tagging. Each object member (field, variable, or data structure element) receives its own unique tag, enabling precise tracking of individual memory locations. This segmentation allows the system to protect only the specific memory locations that need protection while avoiding the storage overhead of tagging entire objects uniformly.
Solution Approach 2:
The patent applies different tagging strategies to different parts of memory based on their specific security requirements. Critical object members receive fine-grained tagging while less critical areas use coarser tagging or none at all. The tag granularity is locally optimized for each object member, allowing the system to achieve high security where needed while minimizing overall storage overhead.
2Reliability
If fine-grained memory tagging is implemented to protect against software vulnerabilities, then security and reliability are improved, but execution performance deteriorates
Solution Approach 1:
The patent performs tag validation in advance during memory allocation and object construction phases. Tags are pre-computed and stored with memory allocations before actual data operations occur. This preliminary tagging reduces the overhead during execution by avoiding repeated tag computation, allowing the system to maintain high security while preserving execution performance.
Solution Approach 2:
The patent implements self-validating memory operations where the tagged pointer arithmetic automatically verifies bounds and ownership without requiring external validation logic. The tag embedded in the pointer serves both as an identifier and a validation mechanism, allowing the memory operation to validate itself. This self-service approach eliminates redundant validation steps and improves execution performance while maintaining fine-grained security.
Data Source
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Figure 2A
AI summary
Techniques for instruction tagging for intra-object memory tagging are described. In an embodiment, an apparatus includes an instruction decoder to decode a first instruction having an instruction tag value; and execution circuitry coupled to the instruction decoder, the execution circuitry to perform one or more operations corresponding to the first instruction, including generating a first data tag value based on the instruction tag value and a relative enumeration in a pointer to data.