Instruction Execution Trace Memory for Unexecuted Code Detection
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Solution Overview
Problem
Current programmable electronic devices lack an efficient method to determine which program instructions are executed and which are not during program implementation, leading to challenges in memory storage size and potential security risks from unexecuted instructions.
Innovation Solution
A method that selects memory areas for each program instruction, storing a value in these areas based on execution status, using bits to indicate predicate conditions, allowing for parallel storage during execution, and distinguishing between executed and unexecuted instructions, thereby reducing memory size and identifying unexecuted code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If conventional methods are used to track executed instructions, then complete execution information can be obtained, but the memory size required becomes excessively large
Solution Approach 1:
The patent divides the instruction memory into multiple segments or regions, where each segment tracks execution status of specific instruction groups. Instead of maintaining a continuous large memory for all instructions, the tracking is segmented into manageable blocks, reducing overall memory requirements while preserving execution information for all instructions through distributed tracking across segments.
Solution Approach 2:
The patent introduces a hierarchical dimension to instruction tracking by organizing memory addresses into upper and lower parts. The upper part identifies memory segments, while the lower part identifies specific instructions within segments. This dimensional organization allows compact representation of execution status by combining segment-level and instruction-level tracking, significantly reducing the total memory size needed compared to flat address-based tracking.
2Reliability
If all instructions are monitored for execution status, then security against unexecuted code can be ensured, but the complexity of the monitoring system increases
Solution Approach 1:
The patent extracts the execution monitoring function from the main processor core and implements it as a separate, dedicated execution monitoring unit. This extracted unit operates independently to track instruction execution status without interfering with normal processor operations, reducing the complexity burden on the main system while maintaining comprehensive security monitoring through the specialized monitoring component.
Solution Approach 2:
The execution monitoring unit is designed with multi-functionality to handle various monitoring tasks including tracking executed instructions, detecting unexecuted code paths, and providing security verification. By consolidating these diverse monitoring functions into a single universal unit rather than separate mechanisms for each function, the system achieves comprehensive security monitoring without proportionally increasing overall system complexity.
3Measurement precision
If detailed tracking of each instruction execution is implemented, then precise execution information is obtained, but the processing time and overhead increase
Solution Approach 1:
The patent pre-organizes instruction memory into segments with predetermined boundaries and structures before execution begins. Execution status bits are pre-allocated for each segment and instruction position, eliminating the need for dynamic memory allocation or complex address calculation during execution. This preliminary organization enables direct, constant-time updates of execution status without adding processing overhead during instruction execution.
Solution Approach 2:
The execution monitoring mechanism is designed to automatically update execution status information without requiring external intervention or complex processing. As instructions are executed, the monitoring unit self-updates the execution status bits in the segmented memory structure through automatic hardware mechanisms, obtaining precise execution information without imposing significant processing time penalties on the main execution flow.
Data Source
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AI summary
The present description relates to a method comprising a step of selecting memory areas (154) from instruction positions of a program, the instructions each occupying one or more memory locations (510), and the areas (154) comprising for each memory location (510) the same number of bits, preferably equal to one or two.