Instruction Tracing via Run Buffer Transcription

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Solution Overview

Problem

Existing hardware-based instruction tracing solutions for software performance analysis are impractical due to performance limitations, especially for complex software, as they tend to alter or slow down the execution of programs.

Innovation Solution

A method involving transcribing executable instructions into a run buffer, where execution information is extracted and recorded without disrupting the program's execution fidelity, using an instruction tracer that injects executable extraction instructions to log memory access addresses while preserving processor state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If hardware-based instruction tracing is used to observe program execution, then execution information can be captured, but program execution is altered or slowed down dramatically

Engineering Contradiction:
Improveexecution information captureVSAvoidprogram execution speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent creates a copy of the original program instructions in a translation buffer, allowing the copied instructions to be executed instead of the original ones. This copying approach enables tracing without modifying the original program execution path, thus capturing execution information while minimizing impact on execution speed

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The translation buffer serves as an intermediary between the original program and the tracing mechanism. By translating and executing instructions through this intermediate buffer, the system can observe execution behavior without directly interfering with the original program flow, thereby reducing execution overhead

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of information

If tracing execution is performed to analyze software performance, then performance information is obtained, but execution performance deteriorates

Engineering Contradiction:
Improveperformance informationVSAvoidexecution performance
Core Design Contradiction:
Loss of informationVSProductivity

Solution Approach 1:

The patent segments the tracing process into distinct phases: translation of instructions to a buffer, execution of the buffer, and logging of results. This segmentation allows performance analysis to be conducted in a structured manner that minimizes interference with overall program execution performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary translation of program instructions into a translation buffer before execution. This preliminary action prepares the execution environment in advance, allowing the actual program logic to execute with minimal overhead during the tracing process

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10108528B2High-performance processor instruction tracing
Publication Date: 2018.10.23 MICROSOFT TECHNOLOGY LICENSING LLC
  • US10108528B2 patent drawing
  • US10108528B2 patent drawing
  • US10108528B2 patent drawing

AI summary

High-performance tracing can be achieved for an input program having a plurality of instructions. Techniques such as executable instruction transcription can enable execution of a plurality of instructions at a time via a run buffer. Execution information can be extracted via run buffer execution. Fidelity of execution can be preserved by executing instructions on the target processor. Other features, such as an executable extraction instruction ensemble, branch interpretation, and relative address compensation can be implemented. High quality instruction tracing can thus be achieved without the usual performance penalties.