Insulated Circuit Board Layer Stack for Soldering Warpage Control
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Solution Overview
Problem
The existing insulated circuit boards with aluminum or aluminum alloy circuit and metal layers bonded to ceramic substrates experience significant warpage changes during soldering due to imbalanced stress between the circuit and metal layers, leading to poor soldering outcomes.
Innovation Solution
An insulated circuit board design where the first circuit and metal layers are made of aluminum or aluminum alloys with thicknesses between 0.2 mm and 0.9 mm, and the second circuit and metal layers are made of copper or copper alloys with thicknesses between 0.65 mm and 2.0 mm, maintaining a thickness ratio of 1.4 to 3.2, and an area ratio of 0.5 to 0.8, to balance stress and reduce warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If relatively thick metal sheets made of copper or copper alloy are bonded to the upper surfaces of the circuit layer and metal layer, then the stress-buffering function is improved, but the balance between stress on the circuit layer-side surface and metal layer-side surface collapses, causing significant warpage of the ceramic substrate
Solution Approach 1:
The patent applies local quality by making the second circuit layer (copper) thicker than the second metal layer (aluminum), with a thickness ratio T1/T2 between 1.4 and 3.2. This asymmetric local configuration compensates for the stress imbalance caused by bonding thick copper sheets, maintaining warpage control while providing sufficient stress-buffering function.
Solution Approach 2:
The patent changes the thickness parameters of the circuit and metal layers to resolve the contradiction. Specifically, it sets the thickness of the first circuit layer and first metal layer between 0.2-0.9 mm, the second circuit layer thickness T1 between 0.65-2.0 mm, and controls the thickness ratio T1/T2 between 1.4-3.2, thereby optimizing both stress buffering and warpage control.
2Reliability
If a large warpage change occurs during soldering of the insulated circuit board, then the soldering process is hindered, but the existing layer configuration cannot suppress warpage sufficiently
Solution Approach 1:
The patent applies local quality by creating an asymmetric structure where the second circuit layer is locally thicker than the second metal layer. This localized thickness difference (T1/T2 = 1.4-3.2) creates a counterbalancing moment that compensates for thermal expansion differences during soldering, thereby suppressing warpage change and improving soldering reliability.
Solution Approach 2:
The patent employs asymmetry by deliberately making the second circuit layer thicker than the second metal layer, breaking the symmetric configuration. This asymmetric design (T1 > T2) creates a stress distribution that counteracts the warpage tendency during high-temperature soldering processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses warpage changes during high-temperature soldering and reduces warping of the ceramic substrate, ensuring stable bonding and preventing cracking.
Implementation Method 1
Since the aluminum layer has a stress-buffering function, it is considered that the thickness of the aluminum layer, which is bonded to the surface of the ceramic substrate, and the thickness of the copper layer are preferably set to be substantially equal to each other.
Implementation Method 2
an insulated circuit board in which an aluminum layer made of aluminum or an aluminum alloy is bonded to a surface of a ceramic substrate and a copper layer made of copper or a copper alloy is bonded to the upper surface of the aluminum layer by solid-phase diffusion
Data Source
Figure 1~2B
Figure 3A~3B
Figure 3C~4B
AI summary
An insulated circuit board having a ceramic substrate, a circuit layer on which a circuit pattern is formed and that is bonded to one surface of the ceramic substrate, and a metal layer bonded to the other surface of the ceramic substrate, the circuit layer has a first circuit layer that is bonded to the ceramic substrate and is made of aluminum and a second circuit layer that is bonded to the upper surface of the first circuit layer and is made of copper, the metal layer has a first metal layer that is bonded to the ceramic substrate and is made of aluminum and a second metal layer that is bonded to the upper surface of the first metal layer and is made of copper, the thicknesses of the first circuit layer and the first metal layer are each 0.2 mm or more and 0.9 mm or less and are equal to each other, the second circuit layer has a thickness of 0.65 mm or more and 2.0 mm or less, when the bonding area of the circuit layer is represented by S1, and the bonding area of the metal layer is represented by S2, the area ratio S1/S2 is 0.5 or more and 0.8 or less, and, when the thickness of the second circuit layer is represented by T1, and the thickness of the second metal layer is represented by T2, the thickness ratio T1/T2 is 1.4 or more and 3.2 or less.