Insulated Semiconductor Mesa Fabrication via Dual-Stage Trench Isolation
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Solution Overview
Problem
There is a need for a cost-efficient method to produce semiconductor components with electrically conductive vias that are properly insulated from surrounding regions, as existing methods like silicon on insulator (SOI) technology are expensive and limited by the use of silicon oxide and sapphire materials, and current insulation techniques do not effectively reduce leakage current and mutual interference between electronic circuits.
Innovation Solution
A method involving the formation of insulation trenches in a semiconductor body, with a first insulation layer on the trench sidewalls and a second insulation layer on the back surface, creating insulated semiconductor mesas that are laterally separated, using materials like silicon oxide, aluminum nitride, or polymerized benzocyclobutene to ensure electrical isolation and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon on insulator (SOI) technology is used to insulate electronic circuits, then leakage current and mutual interference are reduced, but manufacturing cost increases and material selection is limited to silicon oxide and sapphire
Solution Approach 1:
The patent changes the material parameter of insulation layers by offering multiple material options (silicon oxide, aluminum nitride, diamond-like carbon, boron-silicate glass, spin-on glass, organosilicate dielectric, silicone, polymerized imide, parylene, polymerized benzocyclobutene, cured resin) instead of being limited to silicon oxide and sapphire. This allows selection based on specific application requirements while maintaining effective insulation performance.
Solution Approach 2:
The patent adds a spatial dimension to insulation by forming insulation trenches that extend through the semiconductor body and applying insulation layers on both sidewalls and bottom surfaces. This multi-dimensional insulation approach effectively isolates semiconductor mesas from each other, reducing leakage current and mutual interference between electronic circuits.
2Ease of manufacture
If insulation trenches are formed with insulation layers on sidewalls only, then manufacturing is simpler, but insulation completeness is insufficient and leakage current cannot be adequately reduced
Solution Approach 1:
The insulation structure is segmented into multiple parts: first insulation layers applied on sidewalls of insulation trenches, and second insulation layers applied on bottom surfaces. This segmentation allows each layer to address specific insulation needs, with sidewall layers preventing lateral leakage and bottom layers preventing vertical leakage, achieving complete insulation through coordinated action of multiple segmented insulation elements.
Solution Approach 2:
The patent transitions from two-dimensional sidewall insulation to three-dimensional insulation by adding bottom surface insulation layers. This multi-dimensional insulation approach ensures that semiconductor mesas are completely isolated in all directions, effectively preventing both lateral and vertical leakage currents while maintaining manufacturing feasibility.
3Ease of manufacture
If conventional via insulation methods are used, then via formation is achieved, but proper insulation from surrounding regions is not ensured
Solution Approach 1:
The patent applies preliminary action by forming insulation layers on sidewalls and bottom surfaces of insulation trenches before completing via formation. This preliminary insulation ensures that when vias are subsequently formed and filled with conductive material, the surrounding semiconductor regions are already protected from electrical interference, achieving proper isolation from the outset rather than as an afterthought.
Solution Approach 2:
The insulation layers serve as intermediary elements between the conductive via and surrounding semiconductor regions. These intermediary insulation layers (first insulation layers on sidewalls, second insulation layers on bottoms) mediate the electrical interaction, preventing direct electrical contact and interference between the via and adjacent semiconductor structures, thus ensuring proper electrical isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of semiconductor components with reduced leakage current and mutual interference, enabling flexible and cost-effective manufacturing of insulated semiconductor components, such as TEDFETs with isolated gate structures, while using a variety of insulation materials to improve thermal conductivity and reduce thermal stress.
Implementation Method 1
forming a first insulation layer at least on one or more sidewalls of the insulation trench
Implementation Method 2
depositing a second insulation layer on the back surface
Data Source
AI summary
A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.