Insulated Source/Drain Regions to Prevent Epi-to-Epi Shorts
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Solution Overview
Problem
Conventional transistors face issues such as epi-to-epi shorts and elevated parasitic capacitance due to uncontrolled lateral epitaxial growth of source/drain regions, which affect manufacturing yield and circuit performance, especially in densely packed devices.
Innovation Solution
The IC structures confine lateral epitaxial growth of source/drain regions using insulating material regions, ensuring self-alignment with channel regions, reducing parasitic capacitance and leakage, and enabling high-aspect ratio S/D regions for improved device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If epitaxial growth is used to form source/drain regions, then vertical growth enables contact with channel wires, but uncontrolled lateral growth causes epi-to-epi shorts and elevated parasitic capacitance
Solution Approach 1:
The patent applies preliminary action by forming insulating material regions at designated locations before performing the epitaxial growth process. These pre-formed insulating regions act as barriers that constrain the lateral growth of source/drain regions during epitaxy, preventing epi-to-epi shorts while allowing vertical growth to contact channel wires. This preliminary positioning of insulating structures resolves the contradiction by establishing growth boundaries before the epitaxial process begins.
Solution Approach 2:
The patent introduces insulating material regions as intermediary elements between adjacent source/drain regions. These intermediary insulating structures physically separate laterally growing epitaxial regions, preventing direct contact (epi-to-epi shorts) while permitting vertical growth to reach channel wires. The insulating material acts as a mediator that enables controlled lateral expansion without causing harmful intersections.
2Productivity
If source/drain regions are densely packed to increase device density, then manufacturing productivity improves, but parasitic capacitance and leakage increase
Solution Approach 1:
The patent applies segmentation by dividing the space between adjacent source/drain regions with insulating material regions. This segmentation creates electrical isolation between densely packed regions, reducing parasitic capacitance and leakage currents while maintaining high device packing density. The insulating material segments the continuous semiconductor structure into isolated regions, enabling dense integration without harmful electrical coupling.
3Reliability
If lateral spacing between transistors is increased to reduce epi-to-epi shorts, then manufacturing yield improves, but device isolation area increases
Solution Approach 1:
The patent applies local quality by placing insulating material regions only at specific critical locations where epi-to-epi shorts are most likely to occur, rather than uniformly increasing spacing between all transistors. This localized approach provides necessary electrical isolation and prevents shorts at vulnerable points while maintaining minimal spacing elsewhere, thus preserving device isolation area and maximizing manufacturing yield without excessive area consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of epi-to-epi shorts and parasitic leakage, enhances device isolation, and increases drive strength in gate-all-around devices by allowing more efficient use of wire channels.
Implementation Method 1
uncontrolled lateral epitaxial growth of source/drain regions
Data Source
AI summary
Disclosed herein are source/drain regions in integrated circuit (IC) structures, as well as related methods and components. For example, in some embodiments, an IC structure may include: an array of channel regions, including a first channel region and an adjacent second channel region; a first source/drain region proximate to the first channel region; a second source/drain region proximate to the second channel region; and an insulating material region at least partially between the first source/drain region and the second source/drain region.