Insulating Buffer Layer for Semiconductor Bump Stress Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices face thermal and mechanical stress issues, particularly with fine pitch bumps on low dielectric constant wafers, leading to bump cracking, delamination, and interconnect defects, which decrease production yield and increase manufacturing costs.

Innovation Solution

A method is introduced to form a semiconductor device with a conductive pillar having an interior open space over a semiconductor wafer, where an insulating buffer layer is formed over the wafer, and a bump is created within the pillar to reduce stress, specifically using a ring-shaped conductive pillar and an insulating buffer layer to alleviate thermal and mechanical stress on contact pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fine pitch bumps are used on low dielectric constant wafers, then device density and performance are improved, but thermal and mechanical stress increases causing bump cracking and delamination

Engineering Contradiction:
Improvedevice densityVSAvoidbump integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An insulating buffer layer is introduced as an intermediary between the semiconductor wafer and the bump structure. This buffer layer acts as a stress-absorbing mediator that decouples the thermal and mechanical stress transmitted from fine pitch bumps to the wafer, preventing bump cracking and delamination while maintaining high device density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric constant parameter of the buffer layer is specifically selected to be low (insulating material) to change the stress transmission characteristics. This parameter change allows the buffer layer to absorb thermal and mechanical stress differently than standard dielectric materials, thereby improving bump integrity without sacrificing device density

Inventive Principle:
Principle #35Parameter changes

2Reliability

If thermal and mechanical stress are reduced using an insulating buffer layer, then bump cracking and delamination are minimized, but manufacturing process complexity increases

Engineering Contradiction:
Improvebump integrityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulating buffer layer is formed preliminarily before the bump formation process. By pre-establishing the stress-absorbing buffer structure, the subsequent bump fabrication can proceed with standard processes without requiring additional stress-management steps, thus limiting the increase in manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If standard bump structures are used without stress relief, then manufacturing process is simpler, but production yield decreases due to bump cracking and delamination

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidproduction yield
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The bump structure is segmented into distinct functional layers: the insulating buffer layer separated from both the wafer and the bump. This segmentation allows each layer to perform its specific function independently - the buffer absorbs stress while the bump provides electrical connection - maintaining manufacturing simplicity through modular construction

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The insulating buffer layer effectively reduces thermal and mechanical stress, minimizing bump cracking and delamination, thereby enhancing production yield and reducing manufacturing costs by improving the reliability of electrical interconnects.

Implementation Method 1

forming a buffer layer over the semiconductor wafer... insulating buffer layer to reduce stress

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Implementation Method 2

forming a buffer layer over the semiconductor wafer... to reduce stress on contact pads and bumps

Methodology Applied
Scientific EffectStress relaxation: Stress Relaxation

Data Source

PatentUS9780063B2Semiconductor device and method of forming bump structure with insulating buffer layer to reduce stress on semiconductor wafer
Publication Date: 2017.10.03 JCET SEMICON (SHAOXING) CO LTD
  • US9780063B2 patent drawing
  • US9780063B2 patent drawing
  • US9780063B2 patent drawing

AI summary

A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad.