Insulating Film Coating for Void-Free Semiconductor Underfill

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Solution Overview

Problem

Void formation during the underfill process between a substrate and a semiconductor chip due to obstacles from surface components, leading to non-uniform filling and increased electrical resistance.

Innovation Solution

Forming an insulating film on the surfaces of the substrate and semiconductor chip before bonding, covering the areas where the underfill material will be applied, to ensure uniform filling and prevent voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If underfill material is filled between substrate and semiconductor chip without insulating film formation, then filling process is simple, but voids occur due to surface obstacles

Engineering Contradiction:
Improvefilling process simplicityVSAvoidfilling uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

An insulating film is formed on the substrate surface and/or semiconductor chip surface before the underfill material filling process. This preliminary action covers surface obstacles such as microbumps and wiring, enabling the underfill material to flow uniformly without being blocked, thus preventing void formation while maintaining process simplicity

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If insulating film is formed on substrate and/or semiconductor chip surface, then void formation is suppressed and filling uniformity is improved, but process complexity increases

Engineering Contradiction:
Improvefilling uniformityVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The insulating film is formed selectively on specific surfaces (substrate surface and/or semiconductor chip surface) where obstacles exist, rather than uniformly on all surfaces. This localized approach addresses the void formation problem only where needed, minimizing unnecessary process complexity while achieving the desired filling uniformity

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Suppresses void formation, enhances the semiconductor device's strength, heat dissipation, and electrical characteristics by improving wettability and uniformity of the underfill material application.

Implementation Method 1

forming an insulating film on a first surface of a substrate and a first microbump formed on the first surface

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS20250309187A1Substrate processing method, method of manufacturing semiconductor device, processing apparatus and non-transitory computer-readable recording medium
Publication Date: 2025.10.02 KOKUSAI DENKI KK
  • US20250309187A1 patent drawing
  • US20250309187A1 patent drawing
  • US20250309187A1 patent drawing

AI summary

It is possible to suppress occurrence of a void when filling underfill material between a substrate and a semiconductor chip. There is provided a technique that includes: performing at least one among: (a) forming an insulating film on a first surface of a substrate and a first microbump formed on the first surface, wherein the first surface faces a semiconductor chip when the substrate and the semiconductor chip are bonded together; and (b) forming the insulating film on a second surface of the semiconductor chip and a second microbump formed on the second surface, wherein the second surface faces the substrate when the substrate and the semiconductor chip are bonded together.