Insulating Layer for Semiconductor Carrier Bonding
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Solution Overview
Problem
The bonding of a carrier to a semiconductor die and encapsulant during high temperature processes often results in delamination due to different coefficients of thermal expansion (CTE) between the materials, leading to stress and potential cracking.
Innovation Solution
A method involving the formation of an insulating layer over the semiconductor die and encapsulant, followed by the deposition of an adhesive layer, which bonds the carrier to the adhesive layer, thereby reducing stress across the bonding interface by ensuring a constant CTE across the interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a carrier is bonded directly to mixed surfaces of semiconductor die and encapsulant, then the bonding process is simple, but delamination occurs due to different CTE causing stress at the bonding interface during high temperature processes
Solution Approach 1:
An insulating layer is introduced as an intermediary between the carrier and the mixed surfaces of semiconductor die and encapsulant. This insulating layer has a uniform CTE that acts as a stress buffer, preventing delamination caused by CTE mismatch during high temperature processes while maintaining bonding process simplicity
Solution Approach 2:
The bonding interface is segmented into multiple layers: the carrier, adhesive layer, insulating layer, and the mixed surfaces of semiconductor die and encapsulant. This segmentation allows each layer to have optimized properties, with the insulating layer specifically designed to provide uniform CTE and prevent stress concentration
2Device complexity
If adhesive layer is deposited directly on mixed surfaces of semiconductor die and encapsulant, then the structure is simple, but stress and cracking occur during high temperature processes greater than 180° C.
Solution Approach 1:
The insulating layer serves as a mediator between the adhesive layer and the mixed surfaces, providing a uniform CTE foundation that prevents stress concentration and cracking during high temperature processes, thereby strengthening the bonding interface
Solution Approach 2:
The insulating layer is deposited beforehand to cushion and distribute the thermal stress that will occur during subsequent high temperature processes, preventing stress concentration and cracking before they can occur
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents delamination of the carrier from the semiconductor die and encapsulant during and after high temperature processes, ensuring the carrier remains bonded without cracking or breakage, thus enhancing the reliability of semiconductor device packaging.
Implementation Method 1
different coefficients of thermal expansion (CTE) of the mixed materials at the bonding interface, i.e., the CTE of the semiconductor die is different than the CTE of the encapsulant. The different CTEs of the semiconductor die and encapsulant causes stress at the bonding interface with the adhesive layer
Implementation Method 2
depositing an adhesive layer over the insulating layer, and bonding a carrier to the adhesive layer
Data Source
AI summary
A semiconductor device has a semiconductor die disposed over the substrate. A conductive via is formed partially through the substrate. An encapsulant is deposited over the semiconductor die and substrate. An insulating layer is formed over the semiconductor die and encapsulant. The insulating layer includes an organic or inorganic insulating material. An adhesive layer is deposited over the insulating layer. The adhesive layer contacts only the insulating layer. A carrier is bonded to the adhesive layer. The insulating layer provides a single CTE across the entire bonding interface between the adhesive layer and semiconductor die and encapsulant. The constant CTE of the insulating layer reduces stress across the bonding interface. A portion of the substrate is removed by backgrinding to expose the conductive via. An insulating layer is formed over the substrate around the conductive via. An interconnect structure is formed over the conductive via.