Protective Insulating Layer Layout for Wafer Warpage Control

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Solution Overview

Problem

Stacked semiconductor devices face warpage issues due to compressive and tensile stress on wafers, leading to thin-film defects such as delamination, cracking, and buckling, which complicates the coupling of semiconductor chips.

Innovation Solution

Incorporating insulating structures with different materials having distinct physical properties, such as silicon nitride or silicon oxide, in protective insulating layers to adjust warpage values at various positions on the wafer, using high compressive and low compressive materials to counteract warpage tendencies, thereby reducing defects and improving manufacturing yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If wafer stacking is performed at wafer level to achieve higher capacity and data transmission rate, then productivity and device performance are improved, but warpage of the wafer occurs due to compressive and tensile stress, leading to thin-film defects

Engineering Contradiction:
Improvedata transmission rateVSAvoidthin-film defect rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by positioning insulating structures with different materials (first material with first physical property, second material with second physical property) at specific locations on the wafer. These structures have different stress characteristics that are locally optimized to counteract warpage at each position, allowing the wafer to maintain flatness during stacking while achieving high productivity and data transmission rates.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite materials by incorporating both first material and second material insulating structures on the same wafer. These materials have different physical properties (different stress characteristics) that work together to compensate for warpage variations across different regions of the wafer, preventing thin-film defects while enabling high-capacity stacked device production.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If insulating structures with different materials are incorporated in protective insulating layers to adjust warpage values, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvewafer warpage controlVSAvoidinsulating structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by utilizing materials with different physical properties (stress characteristics) to adjust warpage values at different positions. By changing the material parameter (physical property) of insulating structures based on location, the patent achieves precise warpage control while managing device complexity through systematic material selection.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for precise control of wafer warpage, reducing thin-film defects and enhancing the production of stacked semiconductor devices by tuning local mechanical properties based on the position-specific stress patterns.

Implementation Method 1

The first material may have a tensile residual stress greater than a tensile residual of the second material

Methodology Applied
Scientific EffectResidual stress:

Implementation Method 2

the first material and the second material contain a same material having different physical properties... to adjust warpage values at various positions on the wafer, using high compressive and low compressive materials to counteract warpage tendencies

Methodology Applied
Scientific EffectStress compensation:

Data Source

PatentUS20240290677A1Semiconductor device and method for manufacturing the same
Publication Date: 2024.08.29 SAMSUNG ELECTRONICS CO LTD
  • US20240290677A1 patent drawing
  • US20240290677A1 patent drawing
  • US20240290677A1 patent drawing

AI summary

A semiconductor device includes an interlayer insulating layer, a first protective insulating layer on the interlayer insulating layer, a second protective insulating layer on the first protective insulating layer, and insulating structures disposed in at least one of the first protective insulating layer or the second protective insulating layer, wherein the insulating structures include a first insulating structure including a first material having a first physical property, and a second insulating structure including a second material having a second physical property, and the first material and the second material include a same material, and the first physical property and the second physical property are different physical properties.