Insulating Spacer Structure for Integrated Circuit Devices
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Solution Overview
Problem
The increasing load capacitance between conductive patterns in down-scaled semiconductor devices affects the operation speed and refresh characteristics of semiconductor devices due to reduced separation distances between wiring lines and contact plugs.
Innovation Solution
The integration of a conductive line structure with an insulating capping pattern and spacers, including inner and first insulating spacers with a slit portion, lower and upper insulating portions, and air or polymer spacers, which minimize load capacitance by reducing the separation distance between conductive patterns and preventing contamination during fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the separation distance between conductive patterns is reduced to increase integration density, then the integration density is improved, but the load capacitance between conductive patterns increases
Solution Approach 1:
An insulating spacer structure is introduced as an intermediary element positioned between adjacent conductive patterns (conductive line and contact plug). This spacer includes a first insulating spacer and a second insulating spacer that collectively fill the separation space, providing electrical isolation and reducing capacitive coupling while allowing the conductive patterns to maintain reduced separation distances for high integration density.
Solution Approach 2:
The insulating spacer structure exhibits varying properties at different locations: the first insulating spacer has a first dielectric constant while the second insulating spacer has a second dielectric constant that is different from the first. This local quality variation allows optimization of capacitance reduction in specific regions while maintaining overall integration density, with the spacer material properties being tailored to the local electrical field requirements.
2Reliability
If complex insulating spacer structures with multiple portions and slits are used to minimize load capacitance, then the load capacitance is reduced, but the device complexity increases
Solution Approach 1:
The insulating spacer is segmented into multiple distinct portions: a first insulating spacer and a second insulating spacer, with the second spacer positioned on top of the first. This segmentation allows each portion to be optimized independently for capacitance reduction while maintaining a manageable overall structure that can be fabricated using standard multi-layer deposition processes.
Solution Approach 2:
The insulating spacer structure incorporates a vertical dimension with the second insulating spacer stacked on the first insulating spacer, creating a multi-layer configuration. This vertical stacking approach reduces lateral space requirements and allows capacitance optimization in the vertical field direction while maintaining horizontal integration density, effectively utilizing three-dimensional space management.
Data Source
AI summary
An integrated circuit device includes: a conductive line structure including a conductive line and an insulating capping pattern; and an insulating spacer including an inner spacer and a first insulating spacer, the inner spacer and the first insulating spacer on a sidewall of the conductive line structure. The first insulating spacer includes: a slit portion; a lower insulating portion spaced apart from the inner spacer such that a separation distance between a portion of the lower insulating portion and the inner spacer decreases with increasing vertical distance from the substrate; and an upper insulating portion contacting the inner spacer. A method of forming the insulating spacer includes: forming a polymer layer on the inner spacer; forming a first insulating spacer layer which contacts each of the inner spacer and the polymer layer; and forming a first insulating spacer by partially removing the first insulating spacer layer.