Insulating Substrate With Integrated Resistance Layer For Switching Speed Alignment

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Solution Overview

Problem

Existing methods for adjusting gate resistance in power semiconductor elements to align switching speeds between elements lead to increased power loss and decreased electric power efficiency.

Innovation Solution

An insulating substrate with a control signal circuit layer and a resistance layer formed integrally with the signal wire, using materials like silicon oxide and metal oxide, to adjust input resistance and align switching speeds between semiconductor elements without increasing overall size or inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If gate resistance is increased to align switching speeds between semiconductor elements, then switching speed alignment is improved, but power loss increases and electric power efficiency decreases

Engineering Contradiction:

Improveswitching speed alignmentVSAvoidpower loss

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The gate resistance adjustment function is segmented from the semiconductor element itself and relocated to the insulating substrate's control signal circuit layer. This allows independent optimization of the resistance value without affecting the semiconductor element's internal structure or performance characteristics.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

An intermediate resistance layer is introduced in the control signal circuit layer between the signal source and the semiconductor element gates. This intermediary component provides the necessary gate resistance for switching speed alignment while being separate from the power handling paths, thus minimizing its impact on power loss.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a gate resistance component is provided as a separate chip component between the wire and gate terminal, then switching speed variation is reduced, but device complexity and size increase

Engineering Contradiction:

Improveswitching speed consistencyVSAvoidcomponent quantity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The gate resistance function is merged into the control signal circuit layer of the insulating substrate. The resistance layer is formed integrally with the control signal wiring, eliminating the need for separate gate resistance chip components and reducing overall device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The control signal circuit layer serves multiple functions: it provides signal transmission pathways and simultaneously provides the necessary gate resistance through the integrated resistance layer. This multi-functionality reduces the total number of components needed in the system.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If gate resistance is increased to adjust switching time, then switching speed alignment is improved, but inductance of the substrate increases

Engineering Contradiction:

Improveswitching timing alignmentVSAvoidinductance

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The resistance layer is localized specifically in the control signal circuit layer where it is needed for gate resistance adjustment. By concentrating the resistive properties in this specific location rather than distributing them throughout the substrate, the inductance impact is minimized while maintaining switching speed alignment.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach suppresses the decrease in electric power efficiency while maintaining aligned switching speeds between semiconductor elements, reducing the need for additional chip components and minimizing the size and inductance of the substrate.

Implementation Method 1

a part of the control signal circuit layer is formed as a resistance layer that increases an input resistance when a circuit element receives a control signal

Methodology Applied

Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

a part of the wire layer is formed as a control signal circuit layer that propagates a control signal to the first and the second circuit elements

Methodology Applied

Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 3

an insulating layer that electrically insulates between the wire layer and the heat dissipation layer

Methodology Applied

Scientific EffectElectrical Insulation: Dielectric

Data Source

PatentUS10559509B2Insulating substrate and semiconductor device using same

Publication Date: 2020.02.11 PROTERIAL LTD

AI summary

In order to address the problem in that, by increasing the gate resistance of a power semiconductor element, while variation of switching time can be controlled, loss due to the gate resistance becomes larger and power efficiency for the entire system is lowered, the present invention provides an insulating substrate capable of uniformizing switching speeds of circuit elements while suppressing influence on power efficiency of the circuit elements. In the insulating substrate according to the present invention, part of a wiring layer is formed as a control signal circuit layer, and part of the control signal circuit layer is formed as a resistance layer that increases input resistance when the circuit element receives a control signal.