Insulation Fin Structures for Void-Free FinFET Isolation
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Solution Overview
Problem
As semiconductor devices continue to integrate more components into a given area through reduced minimum feature sizes, challenges arise in forming seamless isolation structures that prevent shorting between neighboring source/drain regions, particularly in finFET devices with varying fin spacings, which can lead to manufacturing defects and reduced yield.
Innovation Solution
A method involving the sequential deposition and recessing of dielectric materials using flowable processes to form seamless isolation structures with varying widths, ensuring gap-fill capabilities and minimizing stress on underlying structures, thereby preventing defects and enhancing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional deposition processes are used to form isolation structures, then the manufacturing process is simple, but voids and seams form in the isolation structures leading to shorting between neighboring source/drain regions
Solution Approach 1:
The isolation structure is formed using multiple sequential deposition processes (first flowable deposition, second flowable deposition, and CVD deposition) rather than a single deposition step. This segmentation allows each deposition to target specific regions and fill gaps progressively, ensuring complete void-free coverage while maintaining manufacturing feasibility through standardized process modules.
Solution Approach 2:
Different deposition methods are applied to different regions: flowable deposition is used in first and second regions to form initial isolation layers, while CVD deposition is used in a third region to form a final isolation layer. This local quality approach ensures that each region receives the appropriate deposition treatment to achieve seamless isolation and prevent shorting.
2Productivity
If feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but manufacturing defects increase due to difficulty in forming seamless isolation structures
Solution Approach 1:
Flowable deposition processes are performed preliminarily to form isolation structures in first and second regions before final CVD deposition. This preliminary action ensures that gaps and voids are filled early in the process, creating a foundation for seamless isolation that prevents manufacturing defects even as feature sizes are reduced for higher integration density.
Solution Approach 2:
The isolation structure employs composite deposition techniques combining flowable deposition and CVD deposition. This composite approach leverages the gap-filling capability of flowable deposition and the conformal coverage of CVD deposition to achieve precision isolation structures at reduced feature sizes, thereby maintaining manufacturing precision while increasing integration density.
3Ease of manufacture
If single-material isolation structures are used, then the manufacturing process is simplified, but stress on underlying structures increases causing manufacturing defects
Solution Approach 1:
The isolation structure uses composite materials deposited through different processes (flowable deposition and CVD deposition) with potentially different material compositions and mechanical properties. This composite material approach distributes and reduces stress on underlying structures compared to single-material isolation structures, preventing manufacturing defects while maintaining ease of manufacture through established deposition technologies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described method enables the formation of void-free isolation structures that maintain device integrity and reduce manufacturing defects, allowing for efficient integration of semiconductor components at smaller spacings while minimizing damage to underlying layers.
Implementation Method 1
filling a second portion of the first region with a second dielectric material, wherein the filling the second portion of the first region is performed at least in part with a flowable process
Data Source
AI summary
A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided. In embodiments different isolation structures are formed between different fins in different regions with different spacings. Some of the isolation structures are formed using flowable processes. The use of such isolation structures helps to prevent damage while also allowing for a reduction in spacing between different fins of the devices.