Insulator Plate Porous Structure for Uniform Metal Plating
Solution Overview
Problem
The metal plating process on semiconductor wafers results in non-uniformity due to a terminal effect caused by resistance differences between the wafer edge and center, leading to uneven metal atom accumulation.
Innovation Solution
The use of insulator plates with center porous regions and strategically arranged porous regions to control electrical plating current, increasing edge resistance and maintaining similar current values between the edge and center, thereby mitigating the terminal effect and promoting uniform metal plating.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If electrical plating current is supplied to the semiconductor wafer, then metal atoms accumulate on the wafer surface, but non-uniform accumulation occurs between wafer edge and center due to resistance differences
Solution Approach 1:
The insulator plate features a non-uniform porous structure with different porosity distributions: higher porosity at the center region and lower porosity at the edge region. This local variation in structural quality creates position-dependent electrical resistance that compensates for the terminal effect, achieving uniform current distribution across the wafer surface.
Solution Approach 2:
The patent changes the electrical resistance parameter of the insulator plate by controlling the porosity distribution. The porous structure provides conductive pathways with varying resistance - lower resistance at the center and higher resistance at the edges - which modifies the current distribution pattern to achieve uniform plating.
2Manufacturing precision
If the seed layer resistance is reduced to improve current uniformity, then voltage drop decreases, but the terminal effect persists due to the inherent resistance gradient across the wafer
Solution Approach 1:
The insulator plate acts as an intermediary component between the power source and the semiconductor wafer. It introduces a compensating resistance distribution that offsets the inherent resistance gradient in the seed layer, thereby eliminating the terminal effect without requiring changes to the seed layer itself.
3Manufacturing precision
If insulator plate with porous structure is used to control current distribution, then uniform metal plating is achieved, but device complexity increases
Solution Approach 1:
The insulator plate utilizes a porous structure made from materials such as polymeric foam, porous ceramic, or porous glass. This porous architecture provides controlled electrical resistance while maintaining mechanical integrity, achieving uniform current distribution through the inherent conductive properties of the porous material rather than complex external circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures uniform metal accumulation across the semiconductor wafer by balancing the electrical plating current, reducing the difference in metal atom deposition between the wafer edge and center, thus achieving conformal metal plating profiles.
Implementation Method 1
A first insulator plate comprises a first insulator ring formed around a center porous region. The first insulator ring comprises an insulator material that increases an edge resistance of a current path traveled by the edge plating current to the wafer edge.
Implementation Method 2
The electrical plating current provides electrons that convert metal ions to metal atoms that accumulate on the surface of the semiconductor wafer.
Data Source
AI summary
Among other things, one or more systems and techniques for promoting metal plating uniformity are provided. An insulator plate is positioned relative to a semiconductor wafer that is to be electroplated with metal during a metal plating process. The insulator plate comprises an insulator ring that provides a resistance to electrical plating current passing through the insulator ring to the semiconductor wafer. The insulator plate comprises one or more porous regions, such as holes, that introduce little to no additional resistance to electrical plating current passing through such porous regions to the semiconductor wafer. The insulator plate influences electrical plating current so that edge plating current has a current value similar to a center plating current. The similarity in plating current promotes metal plating uniformity for the semiconductor wafer.