Low-Power States for Computer Systems with Integrated Baseband
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Solution Overview
Problem
Conventional power-gating methods in computer systems with integrated basebands face challenges due to excessive timing latency, making deep power-saving states unreachable, especially when power-gating entry and exit times exceed prescribed constraints, which affects battery life in portable devices.
Innovation Solution
A method for managing low power states in computer systems with integrated basebands, allowing selection and entry into multiple low power states based on baseband module activity, including a first state where memory is self-refreshed and a second state where the baseband module remains powered, enabling transparent memory access, and exit from these states upon wake events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If deep power-gating is applied to system components, then power savings are maximized, but timing latency increases beyond acceptable constraints
Solution Approach 1:
The system segments power management into multiple distinct low-power states (first low-power state with memory self-refresh, second low-power state with baseband powered) rather than using a single deep power-gated state. This allows the system to select the appropriate state based on baseband activity, achieving power savings without excessive latency penalties.
Solution Approach 2:
The power management system dynamically transitions between different low-power states based on real-time baseband module activity detection. The system can adaptively select between memory self-refresh mode and baseband-powered mode, making power consumption and latency characteristics dynamic rather than static.
2Loss of energy
If memory controller is powered off for deep power savings, then energy consumption decreases, but memory access latency increases significantly
Solution Approach 1:
The memory controller power management is segmented into at least two operational modes: a first low-power state where the memory controller is powered off and memory uses self-refresh, and a second low-power state where the memory controller remains powered to enable transparent memory access. This segmentation allows the system to choose the appropriate mode based on whether baseband module activity is detected.
Solution Approach 2:
The system introduces an intermediary detection mechanism that monitors baseband module activity to determine which power state to enter. This intermediary decision-making layer allows the system to balance between power savings and latency requirements by selecting the appropriate power state based on actual operational needs.
3Loss of energy
If baseband module activity is monitored to select power states, then power conservation is optimized, but system complexity increases
Solution Approach 1:
The power management system is designed to handle multiple functions through a unified framework: it detects baseband activity, determines the appropriate power state, transitions to that state, and manages wake events. This multi-functional approach consolidates what could be separate complex subsystems into a coordinated power management mechanism.
Data Source
AI summary
A method of entering a power conservation state comprises selecting and entering one of a plurality of low power states for the computer system in response to a detected system idle event. The plurality of low power states comprise a first low power state and a second low power state for the computer system. A memory of the computer system is self refreshed during the first low power state. A baseband module of the computer system remains powered, and the memory is accessible to the baseband module during the second low power state. The one low power state is selected depending upon baseband module activity. The method also includes exiting from the one of a plurality of low power states when a wake event is detected.