Integrated BEOL Semiconductor Packaging for Fine-Pitch Die Links
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Solution Overview
Problem
The increasing integration density of semiconductor components poses challenges in connecting integrated circuit dies through interposers alone, particularly due to the high cost of interposer fabrication and the difficulty in achieving ultra-fine-pitch connections with Embedded Multi-die Interconnect Bridges (EMIB).
Innovation Solution
A 2.5D integrated circuit packaging method where integrated circuit dies are placed side by side and connected using a common integrated BEOL structure, which serves as an interposer or silicon bridge, eliminating the need for through-silicon vias and reducing costs by using BEOL processes for interconnect formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interposers are used to connect integrated circuit dies, then connectivity between dies is achieved, but manufacturing cost increases
Solution Approach 1:
The patent extracts the interposer function from a separate component and integrates it directly into the substrate. The substrate is configured to directly connect first and second integrated circuit dies without requiring a distinct interposer component, thereby eliminating interposer fabrication costs while maintaining die connectivity through integrated conductive structures and vias within the substrate
Solution Approach 2:
The patent merges the substrate and interposer functions into a single integrated substrate structure. The substrate includes integrated conductive paths, vias, and connection structures that simultaneously provide mechanical support and electrical interconnection between dies, combining what were previously separate components into one unified element
2Manufacturing precision
If Embedded Multi-die Interconnect Bridges (EMIB) are used for ultra-fine-pitch connections, then connection density increases, but manufacturing difficulty increases
Solution Approach 1:
The patent performs preliminary actions by pre-forming conductive structures, vias, and interconnection paths within the substrate before die attachment. The substrate is prepared with integrated conductive features that guide and simplify the connection process, eliminating the need for complex post-attachment EMIB formation and reducing manufacturing difficulty while achieving fine-pitch connections
3Productivity
If integration density increases, then more components are integrated into a given area, but connection challenges increase
Solution Approach 1:
The patent transitions from planar two-dimensional connections to three-dimensional vertical interconnections through the substrate. By utilizing vias and conductive structures that extend through the substrate thickness, the design achieves high-density interconnections in the vertical dimension, enabling more components to be integrated in a given footprint while simplifying the connection architecture compared to lateral EMIB approaches
Data Source
AI summary
Embodiments of the present disclosure provide a semiconductor package comprising a first integrated circuit (IC) die having a first back-end-of-the-line (BEOL) structure, a second integrated circuit die having a second BEOL structure, an integrated BEOL structure having a first side in direct contact with both the first BEOL structure and the second BEOL structure. In some embodiments, a substrate is further disposed at a second side of the integrated BEOL structure to support both the first integrated circuit die and the second integrated circuit die.