Integrated Circuit Testing With Concurrent Burn-In and Automated Testing
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Solution Overview
Problem
The testing of semiconductor devices is a time-consuming process, particularly with the stricter design and manufacturing specifications imposed by miniaturized integrated circuits, which complicates the integration of efficient testing methods.
Innovation Solution
A method and system for simultaneously performing a burn-in test and automated test of integrated circuits, utilizing a carrier wafer with heater chips to apply thermal and environmental stress, thereby reducing testing time and eliminating the need for separate burn-in boards or ovens.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate burn-in testing and automated testing are performed sequentially, then comprehensive testing coverage is achieved, but testing time is significantly extended
Solution Approach 1:
The patent combines burn-in testing and automated testing into a single integrated test flow by placing both test programs in the same test pattern file and executing them concurrently on the same semiconductor device through the test probe card and carrier wafer system, eliminating the need for sequential testing
Solution Approach 2:
The carrier wafer and test probe card system is designed to perform multiple functions simultaneously: it can apply thermal stress for burn-in testing while also performing electrical automated testing through the same physical interface, making the testing system multi-functional and eliminating the need for separate testing equipment
2Reliability
If traditional separate burn-in testing equipment is used, then reliable stress testing is achieved, but equipment cost and complexity increase
Solution Approach 1:
The patent merges the burn-in testing functionality into the existing automated testing system by integrating the burn-in test program into the same test pattern file and using the same carrier wafer and probe card infrastructure, thereby eliminating separate burn-in ovens and test equipment
Solution Approach 2:
The semiconductor device itself serves as its own burn-in testing platform by executing the burn-in test program through its normal test interfaces (power pins, signal pins) without requiring external specialized equipment, thus the device tests itself using existing infrastructure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly shortens the testing time by detecting failures early and optimizing the testing process, while reducing costs by eliminating the need for additional equipment.
Implementation Method 1
utilizing a carrier wafer with heater chips to apply thermal and environmental stress
Data Source
AI summary
A method of testing an integrated circuit on a test circuit board includes performing, by a processor, a simulation of a first heat distribution throughout an integrated circuit design, and simultaneously performing a burn-in test of the integrated circuit and an automated test of the integrated circuit. The burn-in test has a minimum burn-in temperature of the integrated circuit or a burn-in heat distribution across the integrated circuit that includes a set of circuit blocks or a first set of heaters. The integrated circuit design corresponding to the integrated circuit. The performing the simulation includes determining a heat signature of the integrated circuit design from configured power information or location information for each circuit block of the set of circuit blocks or each heater of the set of heaters included in the integrated circuit design. The heat signature includes heat values distributed throughout the integrated circuit design.