Integrated Circuit ECC Sequencing for High-Speed Data Reliability
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Solution Overview
Problem
As semiconductor devices operate at increased speeds, the likelihood of errors during data transmission rises, necessitating a reliable method for error detection and correction that existing technologies have not adequately addressed.
Innovation Solution
An integrated circuit design that simultaneously performs error correction operations across multiple semiconductor devices, utilizing a configuration where one semiconductor device outputs a command and chip select signals to enable error correction operations in other devices, allowing for simultaneous detection and correction of errors in data stored across multiple devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data input/output speed of semiconductor devices is increased, then operating speed is improved, but the probability of error during data transmission increases
Solution Approach 1:
The patent applies preliminary action by performing error correction operations before data transmission completes. Multiple semiconductor devices perform error correction in advance on stored data, and error information is detected and prepared before being output. This ensures that even at high speeds, errors are corrected proactively, maintaining reliability despite increased transmission speed.
Solution Approach 2:
The patent implements feedback by having semiconductor devices output error information signals that provide feedback about data integrity. The first semiconductor device receives error information from second semiconductor devices, creating a feedback loop that allows the system to detect and respond to transmission errors, thereby maintaining reliability at high operating speeds.
2Reliability
If error correction operations are performed on multiple semiconductor devices, then data reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the error correction function across multiple independent semiconductor devices. Each device performs error correction operations independently on its own stored data, and error information is segmented into separate signals from each device. This distributed approach improves reliability through redundancy while managing complexity by keeping each individual device's function relatively simple.
Solution Approach 2:
The patent implements universality by designing semiconductor devices that can universally perform error correction operations on data stored in any of the multiple devices. The first semiconductor device can receive and process error information from second semiconductor devices, making the error correction capability universal across the system rather than device-specific, thereby improving reliability without proportionally increasing complexity.
Data Source
AI summary
An integrated circuit includes a first semiconductor device suitable for outputting a first error information signal by performing a first error correction operation, and a second semiconductor device suitable for outputting a second error information signal by performing a second error correction operation. The first error correction operation and the second error correction operation are performed simultaneously, and the second error information signal is outputted from the second semiconductor device after the first error information signal is outputted from the first semiconductor device.